What’s Holding Back Analog?

Tools and methodologies are outdated, which limits innovation.


The uneasy relationship between digital and analog, coupled with tools that are either ineffective or outright ignored by the analog community, may be limiting the growth potential and technological advances in that market.

That certainly doesn’t mean analog isn’t growing. In fact, analog is an increasingly critical component of ICs and the electronic devices they inhabit. The global electronics market is set to incorporate more than 127.5 billion analog ICs this year, according to Semico Research. This equates to several analog chips per device, with anticipated sales of $8 billion by 2020. But Semico also points to an inflection point on the horizon.

The market researchers said analog ICs experienced stronger than average growth over the last several years, in part because mobility products such as smart phones grew at double digit rates, and in part because these products have a higher than average analog content. That has driven faster growth than the overall market. At the same time, the firm said this appears to be changing because the smartphone and tablet markets are flattening due to saturation.

Jim Feldhan, Semico’s president, said in a recent newsletter that even though the Internet of Things is being counted on as a strong growth driver for analog parts and sensors, large volumes are still a few years away. As as a result, Semico predicts an inflection point in the analog market whereby over the next five years, analog sales growth will slow to a CAGR of 4.3% in dollar terms and 7.9% in unit terms.

But some industry insiders speculate this inflection may be due as much to a lack of focus on analog design from EDA tool providers.

“The design practices haven’t changed dramatically in some of the ways that digital design environments have changed in the last 20 years,” said Jeff Miller, product marketing manager for electronic design systems in Mentor Graphics’ Deep Submicron Division. “The basics are very much this hand-craftsmanship approach by people who have developed their analog expertise over a very long period of time, and there isn’t as much standardization in how things are done. One analog designer looks at another analog designer’s layout and says, ‘I don’t know about that,’ so it’s a very interesting and very different market from the very standardized digital flows with a lot of automation. There’s a lot of hand-craftsmanship and very custom designs.”

This still happens even at the most advanced process nodes, but the bulk of the analog development is back a few nodes. “A lot of the analog design isn’t moving down the feature sizes, and a lot of the interesting analog design is happening at 90, 130, or even 180nm in some of the power management cases. There are a lot of interesting things going on, but it’s also a very different technology innovation schedule from the digital side.”

But regardless of whether it is on one chip or multiple chips, there also is far more interaction these days between the digital and analog portions of a system.

“Twenty years ago you could design an analog block with standardized ports and declare victory,” said George Zafiropoulos, vice president of solutions marketing at National Instruments. “Maybe you had one control register. That was pretty straightforward. Today, the analog circuitry usually has a lot of closed-loop control with the digital, and it still is two different design disciplines that are being forced more and more together. Software plays a role in that too, so actually now you have the firmware people involved. This is extreme in communications areas like 5G, where you have the power rails being modulated by the signal to minimize power consumption. The need to get the analog and digital talking together is really important, and that makes this analog-digital crossover not just one person’s problem anymore It’s lot of people’s problem.”

Fuzzy boundaries
There has been a move for some time to make analog more digital-like, which blurs the lines between these two worlds.

“A lot of analog-only characteristics effects are now being required for digital design, as well, so you can’t really tell them apart in one sense,” said Geoffrey Ying, director of AMS product marketing for Synopsys’ Design Group. “However, we see designs are still being done separately, so verification of the two continues to be one of the challenges for mixed-signal.”

On top of that, each company has its own strategy for how to pull the pieces together. “Big companies that are used to working on SoCs that have analog on them may not have a great methodology, but they bite the bullet and get it done,” said Fred Martin, vice president of radio technology for wireless connectivity business unit at ARM. “There’s a whole array of guys out there that are digital-only or specialty chipmakers who want nothing to do with it, but the world is not letting them get away with that anymore. So there’s a big challenge for those guys to figure out how to play in that space without having to deal all the expertise that the big guys have spent the last few decades figuring out.”

For EDA vendors, the big question is who will buy tools and use them for analog, a problem that is compounded by a bifurcation in this market. Sundari Mitra, co-founder and CEO of NetSpeed Systems, believes there will be two different domains in analog. “One, which is going to stay in the higher geometries is pure analog, and it’s going to stay there. However, the mixed signal content is absolutely going to keep increasing. If you look at what is happening in terms of what is required in automotive, for example, it’s a very analog function that people are trying to compute around — vision, observing, looking at what is there, converting it into data bytes, and somehow digesting it to make real-time decisions. The real-time decision-making cannot happen in analog in large numbers because of the power envelopes of analog designs, so it has to be digitized. Even if you look at a SerDes, which is an extensively mixed-signal piece, what’s going on is people are trying to digitize the analog pieces of it. The front end of a receiver is becoming more of a DSP engine rather than a pure analog piece. That merger is going to continue, and it’s going to become even more interesting with photonics coming in.”

Because of this, Mitra sees a tremendous need for the EDA industry to keep up with the mixed-signal. “There is going to be a lot of innovation that is going to happen in the mixed signal/analog space, and it would be sad if we leave that aside and say analog is analog, and digital is digital, because that’s where the innovation for semiconductors can happen.”

Metrics for change
There is at least some progress in this regard.

“Mixed-signal design has a long way to go, but sometimes we forget where we came from, and today it’s much more integrated and converged than ever before,” said Mladen Nizic, engineering director, mixed-signal solutions at Cadence. “What’s encouraging to me, looking at this industry over 30 years, is we have been talking top-down analog and mixed-signal design for so long and actually now it’s starting to happen a little bit. If you look today, the designs are complex, whichever application you take. There are a lot of tradeoffs that have to be made, starting with the system level. What should I do in analog? What should I do in digital? How should I partition the design? The power actually drives a lot of tradeoffs there as well. Design teams that can integrate things faster tend to be more successful. And integrating faster doesn’t mean you design things separately, then try to bring it together later, so you have to do that concurrently as much as possible.”

What’s encouraging to him is that in the last few years there has been quite a bit of adoption of metric-driven, top-down methodologies. Those are different kinds of methodologies for analog. “Now it is getting traction—not as fast as we would like, but we are headed in the right direction.”

Part of spurring that traction is the joining together of analog and digital design disciplines. Zafiropoulos stressed that engineering teams are getting designs done, so they are managing through it, but there are a lot of obstacles. “There are a lot of things that are not very efficient, and newer design methodology-type of approaches. In the verification world starting 20 years ago, the methods for verification in the digital world shifted substantially from simple directed test to much more sophisticated software-driven testing. In analog, we’re still pasting together transistors and running SPICE.”

He said there are a few examples of where designs have gone past that — but not enough. “The analog world has always lagged the digital world, methodologically. That has to change because it has to be more efficient as things are becoming more complex, and somebody has to pull that whole thing together. That poor somebody is generally not an expert in both domains, and a lot of times it’s the digital guy who stubs out the analog part because they don’t really understand it. That whole process requires both technology and methodology changes to bring the analog guys more into the modern world. They will do this kicking and screaming, protesting all the way.”

Mitra agreed, and pointed to an example of a phase-lock loop. “A phase-lock loop is a design that is there in droves in chips. There used to be a time when one phase-lock loop was enough. To run a closed loop simulation of a phase-lock loop, you can run the entire digital chip, but the PLL simulations take forever—someone needs to do something about those kinds of things. I think that may be slowing down some of the innovations that happen in the analog space because people are held back by it.”

Speaking as a self-described designer in withdrawal, Martin said what often happened in the past with tools and methodologies is that designers start with a great new tool with great promise, and they end up spending 90% of their time fighting the tool and never spending much time actually working on a circuit.

“What has tended to work historically — and my guess is that it will continue to be the main path — is you try to isolate the design between analog and digital for a very long time, and then verify it at the top level using something that is very abstracted. I’d love to see the day when that’s going to change but I don’t think it’s soon,” he concluded.

How this evolves over time is uncertain, but the hope is that more extensive design tools for analog designers are underway to spur the innovation that drives semiconductor growth.

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Kev says:

“but the PLL simulations take forever”

Only because the EDA companies don’t want to sell analog behavioral modeling tools that will do it fast. Verilog-AMS was supposed to be a unified language standard that supported that, but EDA companies prefer to sell you a plethora of tools under different licenses rather than one that works properly.

You can also combine analog and digital modeling in useful ways to handle things like PLL jitter, but your chances of seeing that in any tools from the big EDA companies anytime soon are very low.


On the title question: not many analog engineers transition from design into methodology/EDA, and generally they are very bad at abstraction anyway, so change goes at glacial pace. On the bright side: FD-SOI requires a different mindset to traditional analog IC design, so maybe that will speed things up.

dick_freebird says:

Analog designers are details oriented (or they soon fail and leave). A tool developer left to themselves in creating an abstraction-
oriented tool risks abstracting the wrong thing. A behavioral
model which fully expresses everything any analog part’s user
might decide to care about, will necessarily approach the level
of complexity of a full netlist and become just as lumbering and

Abstraction helps integration when the pieces are in hand. It is
only somewhat useful in creating the first instance. Without all of
the “care-abouts” abstracted properly, you can integrate garbage
with a smile on your face (until later).

The big problem with wanting more analog “stuff” quicker is that
it’s always, always driven by wanting it cheaper as well (if not
foremost). Whether you get that by giving an engineer a CAD
seat that costs more than they do, that’s iffy at best, a side
adventure more likely if the tool is unfamiliar or a new-to-market
termite mound.

And nobody wants fewer bits of analog accuracy despite not
being able to provide a clean enough signal to use them and
despite us being well past where natural transistor quality can
make it happen. So as noted things are becoming crazy complex
and often for no added value in fact, only man-years burned for
a product that’s obsolete next Christmas.

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