Artificial Neural Network (ANN)-Based Model To Evaluate The Characteristics of A Nanosheet FET (NSFET)


This new technical paper titled "Machine-Learning-Based Compact Modeling for Sub-3-nm-Node Emerging Transistors" was published by researchers at SungKyunKwan University, Korea. Abstract: "In this paper, we present an artificial neural network (ANN)-based compact model to evaluate the characteristics of a nanosheet field-effect transistor (NSFET), which has been highlighted as a next-generat... » read more

The Reliability Of Analog Integrated Circuits And Their Simulation-Aided Verification


Different challenges have to be overcome when designing integrated circuits. Besides schematic and layout design work, verification in view of the non-ideal behavior of circuits and semiconductor technologies in particular is also relevant. The designed circuits have to work at specific operating voltages and within ambient temperature ranges and be robust in terms of process fluctuations ... » read more

Accelerating Circuit Simulation 10x With GPUs


By Samad Parekh (Synopsys) and Srinivas Kodiyalam (NVIDIA) Many aspects of semiconductor design and verification have an ever-growing “need for speed” that has outpaced the performance improvements available by running on CPUs. Electronic design automation (EDA) companies have responded by creating smarter software algorithms to improve simulation time, sometimes at the expense of relaxe... » read more

Parasitic Characterization Comes To Power Design Simulation


Two power design challenges are taking teams into unfamiliar territory. Wide bandgap (WBG) semiconductors target greater efficiency and density. Stricter EMI compliance regulations now come standard in mission-critical industries. Power design practices are still catching up. Simulation often takes a back seat to respinning hardware prototypes until success. What’s missing that could make sim... » read more

Context-Aware SPICE Simulation Improves The Fidelity Of ESD Analysis


Electrostatic discharge (ESD) is a major reliability concern for integrated circuit (IC) designs. ESD verification is proving to be a significant challenge at advanced nodes, due to growing IC design complexity and transistor counts. Traditional ESD verification approaches using parasitic extraction followed by SPICE simulation are deficient in providing simulation results in a practical runtim... » read more

Leveraging Symbolic Simulations For IO Verification


IO libraries and interface IPs are an important part of any integrated circuit design that needs to communicate with the outside world or other integrated circuits. Interface IPs are the literal gatekeepers to the flow of logical and electrical information from one IC to another to form today’s complex computer systems, influencing almost every aspect of our lives these days. Interface IPs (e... » read more

Virtual Prototyping For Power Electronics Systems


By Alan Courtay and Gobi Kengara Palayam Appavoo Every day, power electronics systems play a bigger role in our lives. All-electric and hybrid vehicles are now common on our streets. Electrification of the aerospace industry is accelerating, and observers expect hybrid and electric aircraft to make an impact over the next decade or two. Many industrial systems rely increasingly on electronic... » read more

Understand MOSFET Switch Behavior Via An LED Driver Simulation


Automotive incandescent bulbs have largely given way to more efficient, reliable, stylish, and even safer light emitting diodes (LEDs). LEDs turn on in a fraction of the time and are especially useful in brake lamps, where fractions of a second matter. The challenge in designing an automotive LED lamp is in satisfying government requirements for light output while also being cost effective. Ano... » read more

Post Layout Simulation Is Becoming The Bottleneck For Analog Verification


My, have times changed. I remember when I first started out as a green analog designer right out of college, we would cut rubylith masking film on a large light table representing the different layers of our design to generate the design for manufacturing of the chip. We proactively worked to mitigate cross coupling of noise to our signal nets, but we were rarely concerned about interconnect re... » read more

Week In Review: Design, Low Power


Flex Logix uncorked a new EFLX 1K eFPGA core optimized for the needs of customers on TSMC 40nm Ultra Low Power (ULP) and 40nm Low Power (LP) process technologies. It targets customers focused on low cost and power management. Using a cut-down version and the same software of the EFLX 4K, the EFLX 1K Logic core has 368 inputs and 368 outputs with 900 LUT4 equivalent logic capacity. The EFLX 1K D... » read more

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