Overcoming The Limits Of Scaling


Semiconductor Engineering sat down to discuss the increasing reliance on architectural choices for improvements in power, performance and area, with [getperson id="11425" comment=" Sundari Mitra"], CEO of [getentity id="22535" comment="NetSpeed Systems"]; Charlie Janac, chairman and CEO of [getentity id="22674" e_name="Arteris"]; [getperson id="11032" comment="Simon Davidmann"] CEO of [getentit... » read more

Formal’s Roadmap


Formal verification has come a long way in the past five years as it focused on narrow tasks within the verification flow. Semiconductor Engineering sat down to discuss that progress, and the future of formal technologies, with [getperson id="11306" comment="Raik Brinkmann"], president and CEO of [getentity id="22395" e_name="OneSpin Solutions"]; Harry Foster, chief verification scientist at [g... » read more

An Easier Path To Faster C With FPGAs


For most scientists, what is inside a high-performance computing platform is a mystery. All they usually want to know is that a platform will run an advanced algorithm thrown at it. What happens when a subject matter expert creates a powerful model for an algorithm that in turn automatically generates C code that runs too slowly? FPGA experts have created an answer. More and more, the genera... » read more

Power/Performance Bits: Oct. 18


Speeding up memory with T-rays Scientists at the Moscow Institute of Physics and Technology (MIPT), the University of Regensburg in Germany, Radboud University Nijmegen in the Netherlands, and Moscow Technological University proposed a way to improve the performance of memory through using T-waves, or terahertz radiation, as a means of resetting memory cells. This process is several thousand... » read more

What’s Missing From Machine Learning


Machine learning is everywhere. It's being used to optimize complex chips, balance power and performance inside of data centers, program robots, and to keep expensive electronics updated and operating. What's less obvious, though, is there are no commercially available tools to validate, verify and debug these systems once machines evolve beyond the final specification. The expectation is th... » read more

Decoding The Brain


At the Design Automation Conference this year, Lou Scheffer, principal scientist for the Howard Hughes Medical Institute, gave a visionary talk entitled Learning from Life: Biologically Inspired Electronic Design. Scheffer is an IC design guy who came through Stanford and Caltech and worked for HP and [getentity id="22032" e_name="Cadence"] before switching to the medical field eight years a... » read more

Plotting The Next Semiconductor Road Map


The semiconductor industry is retrenching around new technologies and markets as Moore's Law becomes harder to sustain and growth rates in smart phones continue to flatten. In the past, it was a sure bet that pushing to the next process node would provide improvements in power, performance and cost. But after 22nm, the economics change due to the need for multi-patterning and finFETs, and th... » read more

System Bits: May 3


Neural network synapses In a development that could potentially be used as a basis for the hardware implementation of artificial neural networks, Moscow Institute of Physics and Technology (MIPT) researchers have created prototypes of electronic synapses based on ultra-thin films of hafnium oxide (HfO2). The team made the HfO2-based memristors measuring just 40x40 nm2, which exhibit propert... » read more

Power/Performance Bits: Feb. 9


Molybdenum disulfide memristors Researchers at Michigan Technological University constructed an ideal memristor based on molybdenum disulfide nanosheets. "Different from an electrical resistor that has a fixed resistance, a memristor possesses a voltage-dependent resistance," said Yun Hang Hu, professor of materials science and engineering at MTU, adding that a material's electric propert... » read more

Inside Neuromorphic Computing


Semiconductor Engineering sat down to talk about neuromorphic technology with Guy Paillet, chief executive of General Vision. The fabless IC design house is a pioneer and supplier of neuromorphic chips. What follows are excerpts of that conversation. SE: In 1993, you invented and co-patented a neural networking chip with IBM. Then, you joined General Vision in 1999. Briefly tell us about Gen... » read more

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