tag: SOI

Study Shows FD-SOI Most Cost-Effective Approach at 22nm
By Various Writers - 02 Aug, 2011 - Comments: 0

By Adele Hars What are you doing at 22nm? The debate is raging in the press and forums alike. Now research firm IC Knowledge has issued a report showing that from a straight cost perspective, planar FD-SOI is a better choice than bulk. We’ve known for a while that sticking with bulk at the 22nm node would get pretty complicated. This study shows just how complicated bulk will be: abou... » read more

New Wii U™ on SOI
By Various Writers - 08 Jul, 2011 - Comments: 0

By Adele Hars If you've followed the industry buzz in recent weeks, you've seen the news: the CPU for Nintendo's upcoming (and very cool) Wii U is on IBM's 45nm SOI. IBM's been fabbing chips for Nintendo for over a decade, and first moved the company's CPUs to SOI in 2006, at 90nm. The Wii U, which got its debut at the recent E3 show, will hit the shelves in 2012. The Wii U combines m... » read more

Smart Power on SOI
By Various Writers - 06 Jun, 2011 - Comments: 0

By Adele Hars What if you had to reduce power dissipation by 40x? That's exactly the task that fell to STMicroelectronics, under an EU program called Smart Power Management. At the recent ISPSD (International Symposium on Power Semiconductor Devices and ICs) conference, ST and partners (GE Vingmed Ultrasound and Sintef) presented a paper on how they did it, using ST's latest SOI-based ... » read more

Tri-Gate’s Fallout
By Ed Sperling - 26 May, 2011 - Comments: 0

By David Lammers Intel Corp. dropped a rock into the pond of transistor technology when it announced its 22nm tri-gate technology in San Francisco earlier this month. The ripples continue to move out from that event, with impacts on IDMs, foundries, and fabless semiconductor companies being closely studied. Now that Intel has come out of the closet with its tri-gate technology, “the found... » read more

MEMS on SOI – Growing Fast and Faster
By Various Writers - 11 Apr, 2011 - Comments: 0

By Adele Hars In the latest ASN posting by Dr. Eric Mounier of Yole Developpement, “SOI for MEMS: A Promising Material”, he notes that SOI MEMS is growing at a CAGR (2011-2015) of 15.6%, compared to 8.1% for bulk silicon-based solutions. MEMS designers are doing amazing things on SOI – which would explain that impressive growth rate. [caption id="attachment_12" align="aligncenter... » read more

The SOI Papers at ISSCC 2011
By Various Writers - 15 Mar, 2011 - Comments: 0

By Adele Hars The International Solid-State Circuits Conference — better known as ISSCC — is of course where the big guns show us their big advances at the chip level. At the most recent conference, held a few weeks ago in San Francisco, advances that leveraged SOI were once again at the forefront. As always, performance gains generate plenty of buzz. But the SOI papers were also nota... » read more

Frequently Asked Questions About FD-SOI
By Various Writers - 10 Feb, 2011 - Comments: 0

In a question and answer format, Xavier Cauchy, digital applications manager at Soitec ([email protected]) and François Andrieu, senior research engineer at LETI, raise some of the technical issues surrounding fully depleted SOI technology. The authors compare FD-SOI to FinFETs, describe how non-digital transistors can be handled, and provide a list of references for further reading. » read more

Material Effects: Trading Performance For Power
By Ed Sperling - 13 Jan, 2011 - Comments: 0

By Ann Steffora Mutschler Power impacts everything, even when it comes to semiconductor manufacturing materials. While bulk CMOS technology still reigns supreme, there are a number of advanced materials being suggested as replacements when it runs out of steam at around 15nm, including silicon on insulator (SOI)—particularly in combination with FinFET multigate structures on SOI—silicon ge... » read more

A Delicate Balancing Act
By Ed Sperling - 22 Apr, 2010 - Comments: 0

ver since the patent for complementary metal oxide semiconductors was awarded to Frank Wanlass at Fairchild in 1967, CMOS has proved to be one of the most durable technologies in electronics history. It has powered devices worth trillions of dollars in sales, been the recipient of an estimated $600 billion in R&D, and become the basis of some of the most refined manufacturing processes in h... » read more

Moore’s Law vs. Low Power
By Ed Sperling - 17 Sep, 2009 - Comments: 0

By Ed Sperling Moore’s Law and low-power engineering are natural-born enemies, and this dissension is becoming more obvious at each new process node as the two forces are pushed closer together. The basic problem is that shrinking transistors and line widths between wires opens up far more real estate on a chip, which encourages chip architects and marketing chiefs at chipmakers to take... » read more

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