Leading Chip Maker Rolls Out SoC For Automotive Market With NetSpeed Gemini


While SoC performance is important to support automotive applications, three criteria, safety, security, and reliability have to outperform almost any other application. Safety because an automobile is a life-critical system, security because you don’t want to allow any malware to penetrate this system, and finally reliability as we all expect our car to be failure-free for years if not decad... » read more

2.5D Becomes A Reality


Semiconductor Engineering sat down to discuss 2.5D and advanced packaging with Max Min, senior technical manager at [getentity id="22865" e_name="Samsung"]; Rob Aitken, an [getentity id="22186" comment="ARM"] fellow; John Shin, vice president at [getentity id="22903" e_name="Marvell"]; Bill Isaacson, director of ASIC marketing at [getentity id="22242" e_name="eSilicon"]; Frank Ferro, senior di... » read more

2.5D Becomes A Reality


Semiconductor Engineering sat down to discuss 2.5D and advanced packaging with Max Min, senior technical manager at [getentity id="22865" e_name="Samsung"]; Rob Aitken, an [getentity id="22186" comment="ARM"] fellow; John Shin, vice president at [getentity id="22903" e_name="Marvell"]; Bill Isaacson, director of ASIC marketing at [getentity id="22242" e_name="eSilicon"]; Frank Ferro, senior di... » read more

The Big Race


An estimated 74.39 million automobiles are forecast to be sold this year, according to Statista. That's up about 2.8% over 2015, which on the surface doesn't look like fabulous growth. What isn't apparent in the numbers, though, is the amount and type of semiconductor content. Electronic control units, which are primarily driven by MCUs, increasingly are being replaced by SoCs. Automotive co... » read more

Have Margins Outlived Their Usefulness?


To automate the process of solving complex design problems, the traditional approach has been to partition them into smaller, manageable tasks. For each task, we have built the best possible solution which we continuously refine over time. Additionally, we have managed the interdependencies between tasks by defining boundaries or margins; these often have been best- and worst-case values used t... » read more

The Road To Electronics Consolidation In The Vehicle


I’ve been at Mentor for more than six months as the director of automotive marketing. It’s an exciting technology space with many great stories to tell, most stemming from the fact that the automotive industry is being disrupted like never before. Indeed, I’ve heard it said more than once that there will be more change in the next 5 to 10 years than there has been since the days of Henry ... » read more

Why Is Semiconductor Schedule Predictability Boring?


Why is it not sexy to talk about the manageability of system-on-chip (SoC) projects? As an IP vendor, we are constantly bombarded with questions about how our technology can enhance performance, reduce latency, and lower power consumption. At the same time, reducing cost and time to market for the SoC design conflict with these requirements, even though they rank right up there among the top en... » read more

Advancing SoC Technology


As chip designers, we take logic synthesis for granted. It’s hard to imagine the days when engineers had to design digital logic by hand. But then, it’s no less mind-boggling to believe that NASA engineers used slide rules to calculate and plan the Apollo 11 mission that first landed on the moon. Were engineers just a whole lot smarter in the old days? Maybe. But it’s also true that c... » read more

Adventures In Assembly


With so few [getkc id="81" kc_name="SoC"] designs — if any — today designed completely new from the ground up, the assembly task is an extremely important one to get right. [getkc id="43" kc_name="IP"] components must be put together optimally and efficiently to perfectly match the application requirements, which is complex and intricately nuanced. How companies approach IP varies signif... » read more

IC Compiler II Multi-Level Physical Hierarchy Floorplanning


Large, complex SoC designs require hierarchical layout methodologies that span multiple levels of physical hierarchy. Many EDA tools only handle two levels of physical hierarchy at a given time resulting in longer layout schedules that are risky at best. Synopsys' IC Compiler II provides automation designs with multiple levels of hierarchy that minimizes time to results, provides best QoR, and ... » read more

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