tag: SystemC

Taking Stock Of Models
By Ed Sperling - 19 Dec, 2012 - Comments: 0

By Ann Steffora Mutschler The world of modeling in SoC design is multi-dimensional to say the least. One dimension contains the model creators and providers, while the other is comprised of the types of models that exist in the marketplace. “What we’re seeing today is that we have basically models coming from either IP providers—the people that are actually producing those cores ... » read more

The Good And Bad Of Models
By Ed Sperling - 27 Sep, 2012 - Comments: 0

By Ann Steffora Mutschler Driven by fierce competition and the fact that socket decisions are made long before silicon is manufactured, semiconductor companies today ship models and virtual prototypes to their OEMs very early in hopes of locking in the socket. Admittedly, this has been happening for some time, but due to complexity and the need for flexibility of models and virtual platf... » read more

Designing In The Rain
By Jon McDonald - 23 Aug, 2012 - Comments: 0

By Jon McDonald Recently I was running some errands on my motorcycle when I got caught in the rain. Living in Florida, this is a fairly common summer occurrence. Generally, as long as it’s not too much of a deluge, I can continue through to my destination and dry off when I arrive. I always get concerned looks from those going by in their enclosed vehicles—from some, “concerned” mig... » read more

Interface Additions To The e Language For Effective Communication With SystemC TLM 2.0 Models
By Various Writers - 23 Aug, 2012 - Comments: 0

The last several years have seen strong adoption of transaction-level models using SystemC TLM 2.0. Those models are used for software validation and virtual prototyping. For functional verification, TLMs have a number of advantages—they are available earlier, they allow usersto divide their focus on verifying functionality and protocol/timing details, they enable higher level reuse, and they... » read more

Experts At The Table: The Future Of SystemC
By Ed Sperling - 28 Jun, 2012 - Comments: 0

By Ed Sperling System-Level Design moderated a discussion about the future of SystemC with Thomas Alsop, corporate design solution expert at Intel; Ambar Sarkar, chief verification technologist at Paradigm Works; Mike Meredith, vice president of technical marketing at Forte Design Systems; David Black, certified training instructor at Doulos. Here are some of the key outtakes of that discussio... » read more

Experts At The Table: The Future Of SystemC
By Ed Sperling - 24 May, 2012 - Comments: 0

By Ed Sperling System-Level Design moderated a discussion about the future of SystemC with Thomas Alsop, corporate design solution expert at Intel; Ambar Sarkar, chief verification technologist at Paradigm Works; Mike Meredith, vice president of technical marketing at Forte Design systems; David Black, certified training instructor at Doulos. Here are some of the key outtakes of that discussio... » read more

Model-Driven Design: Making Progress
By Ed Sperling - 15 Dec, 2011 - Comments: 0

By Ann Steffora Mutschler Model-driven design is coming into its own, in part because the old way of using models at advanced nodes doesn’t always produce usable chips and in part because of the need for making tradeoffs at the earliest stages of the design process. The concept of developing models for IC design is hardly a new one, and it is being done today on a number of levels rangin... » read more

Slow Adoption for ESL
By Brian Fuller - 25 Mar, 2010 - Comments: 0

By Brian Fuller It’s been more than a decade since electronic system level (ESL) abstraction started to gain traction in EDA. It’s been more than a few years since the industry began to plan for the day when the benefits of embracing C-language approaches to design description and validation would find designers churning out massively complex and profitable designs while sitting in lawn ch... » read more

Exploring The Use Of Virtual Platforms At The Electronic System Level
By Cheryl Ajluni - 27 Mar, 2009 - Comments: 0

By Cheryl Ajluni System design is hard. That should not come as a surprise to anyone these days. With design geometries shrinking and device complexity on the rise, this fact is not likely to change anytime soon. One concept for easing that burden for system-level designers is the virtual platform. Granted, the concept itself is nothing new, but today it is being employed in ever more creativ... » read more

ESL Languages: Which One Is Right For Your Needs?
By Jon McDonald - 19 Feb, 2009 - Comments: 0

The question about ESL language is the right one comes up over and over again.  As customers begin to understand the benefits of modeling and analysis at the system level, they must address this question as one of the first steps in getting started.   What language should be used for ESL—SystemC, SystemVerilog, UML or M? Technically, you can create an ESL/TLM platform in any language yo... » read more

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