tag: test

Scan Compression Is No Longer About Compression
By Rohit Kapur - 16 Sep, 2019 - Comments: 0

Scan compression was introduced in the year 2000 and has seen rapid adoption. Nearly every design’s test methodology today implements this technology, which inserts compression logic in the scan path between the scan I/Os and the internal chains. In this article, we take a critical look at the technology to understand how scan compression has matured. The road to scan compression Since th... » read more

Test On New Technology’s Frontiers
By Ed Sperling And Susan Rambo - 10 Sep, 2019 - Comments: 2

Semiconductor testing is getting more complicated, more time-consuming, and increasingly it requires new approaches that have not been fully proven because the technologies they are addressing are so new. Several significant shifts are underway that make achieving full test coverage much more difficult and confidence in the outcome less certain. Among them: Devices are more connected an... » read more

The Hidden Potential Of Test Engineers
By Marie Ryan - 10 Sep, 2019 - Comments: 0

Design engineers are seen as the cornerstone of new projects in many semiconductor companies, working away with the team to design the next product and making sure it meets all specifications. We pay little thought to the test engineer, who works in the shadows designing algorithms, hardware and software that could pass or fail each die. The test engineer is the last line of defense between... » read more

Highly Efficient Scan Diagnosis With Dynamic Partitioning
By Jayant D'Souza - 10 Sep, 2019 - Comments: 0

Charged with the task of improving yield, product engineers need to find the location of defects in manufactured ICs quickly and efficiently. Typically, they use volume scan diagnosis to generate large amounts of data from failing test cycles, which is then analyzed to reveal the location of defects. Scan failure data provides the basis for many decisions in the failure analysis and yield impro... » read more

Improve Volume Scan Diagnosis Throughput 10X With Dynamic Partitioning
By Mentor, a Siemens Business - 09 Sep, 2019 - Comments: 0

Performing volume scan diagnosis on today’s large, advanced node designs puts demands on turn-around-time and compute resources. This paper describes a new technique to maximize diagnosis throughput while performing ever more demanding scan diagnosis. The dynamic partitioning technology in Tessent Diagnosis enables in a 50% reduction in scan diagnosis time using only 20% of the typical memory... » read more

Ensuring A 5G Design Is Viable
By Ed Sperling - 09 Sep, 2019 - Comments: 0

Ron Squiers, network solutions specialist at Mentor, a Siemens Business, explains what’s different in 5G chips versus 4G, how to construct a front haul and back haul system so it is testable in the network stack. » read more

New Technologies To Support 3D-ICs
By Brian Bailey - 04 Sep, 2019 - Comments: 0

Semiconductor Engineering sat down to discuss changes required throughout the ecosystem to support three-dimensional (3D) chip design with Norman Chang, chief technologist for the Semiconductor Business Unit of ANSYS; John Park, product management director for IC packaging and cross-platform solutions at Cadence; John Ferguson, director of marketing for DRC applications at Mentor, a Siemens Bus... » read more

The Great Test Blur
By Ed Sperling - 06 Aug, 2019 - Comments: 0

As chip design and manufacturing shift left and right, concerns over reliability are suddenly front and center. But figuring out what exactly what causes a chip to malfunction, or at least not meet specs for performance and power, is getting much more difficult. There are several converging trends here, each of which plays an integral role in improving reliability. But how significant a role... » read more

How Many Test Miles Make A Vehicle Safe?
By Kevin Fogarty - 06 Aug, 2019 - Comments: 0

The road to reliable safety testing of autonomous vehicles (AVs) is shifting left. Standards groups are beginning to publish functional safety standards that could make it possible to verify what a machine-learning AV pilot application will do in a traffic situation even before hardware or software is released from validation testing. This kind of approach has been possible for some time in ... » read more

Who Is Responsible For Part Average Testing?
By Kevin Robinson - 06 Aug, 2019 - Comments: 0

With ever-increasing demands in the automotive industry, more and more semiconductor companies are interested in monitoring and improving quality and reliability. Outlier detection and more specifically Part Average Testing (PAT) is the industry standard for the automotive industry. But, who is responsible for quality? Historically, OSATs are responsible for this. In the past, once they... » read more

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