Test Challenges Mount As Demands For Reliability Increase


An emphasis of improving semiconductor quality is beginning to spread well beyond just data centers and automotive applications, where ICs play a role in mission- and safety-critical applications. But this focus on improved reliability is ratcheting up pressure throughout the test community, from lab to fab and into the field, in products where transistor density continues to grow — and wh... » read more

Test Gets Ready For Wi-Fi 7


New test solutions are emerging to address the test challenges associated with the forthcoming Wi-Fi 7 standard. Wi-Fi 7 covers the (so far, for Wi-Fi) unused frequency range between 6 GHz and 7.125 GHz, using up to 4096-QAM modulation schemes and up to 320MHz channel bandwidth (see figure 1). Fig. 1: Wi-Fi band ranges are shown here, including the 3x increase in bandwidth enabled by a... » read more

Looking Forward To SPIE, And Beyond


On the eve of this year’s SPIE Advanced Lithography + Patterning conference, I took a look at the IEEE Devices and Systems Roadmap’s lithography section. It’s especially notable for the emergence of EUV lithography, which has quickly become critical for advanced logic. High-NA tools to support still smaller dimensions are on the horizon. In the near-term, though, the key challenge is not ... » read more

Hunting For Hardware-Related Errors In Data Centers


The semiconductor industry is urgently pursuing design, monitoring, and testing strategies to help identify and eliminate hardware defects that can cause catastrophic errors. Corrupt execution errors, also known as silent data errors, cannot be fully isolated at test — even with system-level testing — because they occur only under specific conditions. To sort out the environmental condit... » read more

Engineering Test Station Facilitates Post-Silicon Validation


The semiconductor market is evolving, with devices becoming more complex as chip designers add cores and pursue 2.5D and 3D integration strategies. This complexity presents challenges extending from design and simulation through system-level test (SLT), where a device is exercised in mission mode, booting up an operating system and running end-user code, for example. These challenges arise f... » read more

Chip Industry’s Earnings Roundup


Editor's Note: Updated throughout February 2023 for additional earnings releases. Many companies reported revenue growth in the most recent quarter, but the latest round of chip industry earnings releases reflected some major themes: Demand for consumer electronics softened due to inflation, rising interest rates, and post-pandemic market saturation, creating a slump in the memory chip ... » read more

Week In Review: Semiconductor Manufacturing, Test


Imec released its semiconductor roadmap, which calls for doubling compute power every six months to handle the data explosion and new data-intensive problems. Imec named five walls (scaling, memory, power, sustainability, cost) that need to be dismantled. The roadmap (below) stretches from 7nm to 0.2nm (2 angstroms) by 2036, and includes four generations of gate-all-around FETs followed by thre... » read more

Chip Industry’s Technical Paper Roundup: Jan. 31


New technical papers added to Semiconductor Engineering’s library. [table id=77 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us posting l... » read more

Wafer Scale Transfer of 2D Materials, Graphene


A new technical paper titled "Assessment of Wafer-Level Transfer Techniques of Graphene with Respect to Semiconductor Industry Requirements" was published by researchers at Infineon Technologies AG, RWTH Aachen University, Protemics, and Advantest. Abstract "Graphene is a promising candidate for future electronic applications. Manufacturing graphene-based electronic devices typically requ... » read more

Screening For Silent Data Errors


Engineers are beginning to understand the causes of silent data errors (SDEs) and the data center failures they cause, both of which can be reduced by increasing test coverage and boosting inspection on critical layers. Silent data errors are so named because if engineers don’t look for them, then they don’t know they exist. Unlike other kinds of faulty behaviors, these errors also can c... » read more

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