Chip Industry Week In Review

By The SE Staff - 24 Apr, 2026 - Comments: 0

Deals Marvell acquired Polariton Technologies, a Swiss developer of plasmonics-based silicon photonics devices. Onto Innovation is partnering with Rigaku, combining Onto’s analysis software with Rigaku’s CD-SAXS platform for advanced semiconductor process control. Onto also agreed to acquire a 27% stake in Rigaku for about $710M. Tesla plans to use Intel’s 14A process for its T... » read more

Chip Industry Week In Review

By The SE Staff - 17 Apr, 2026 - Comments: 0

Acquisitions and business pivots Teradyne acquired Israel-based TestInsight, a semiconductor test provider with pattern conversion, validation, and virtual test capabilities. Credo plans to acquire DustPhotonics, a developer of silicon photonics PICs for optical transceivers. Molex plans to acquire Teramount, a provider of detachable, passive-alignment fiber-to-chip connectivity solu... » read more

AI Accelerators Usher In New Era For IC Test

By Laura Peters - 07 Apr, 2026 - Comments: 0

Key Takeaways The parallelism in AI accelerators enables low latency but complicates failure isolation. HBM can account for 50% of package cost, so known-good stack assurance is critical. DFT and test cooperate to solve final test, singulated die test, SLT, and in-system test for data centers. AI accelerators are used for everything from training large language models to mak... » read more

Untrusted Analog Components Add Risks For Critical Infrastructure

By Anne Meixner - 07 Apr, 2026 - Comments: 0

Key Takeaways New certificate-based solutions are necessary within fabs and packaging houses to deliver trusted semiconductors. Physical IDs bind the device to the certificate, but it needs to be immutable and unclonable. Extrinsic IDs are required for analog, mixed-signal, sensor ICs as well as discrete components. Rising concern over the source and destination of chips, an... » read more

Harnessing Digital Twins And AI/ML For Smarter Semiconductor Test Optimization

By Vincent Chu - 07 Apr, 2026 - Comments: 0

As semiconductor devices become increasingly complex, the challenge of testing them efficiently and accurately grows in parallel. Traditional testing methods—rooted in static test plans—often fall short in dealing with the nuances of today's advanced integrated circuits (ICs), especially in high-volume manufacturing environments. In response, the industry is exploring real-time, data-dri... » read more

Chip Industry Week In Review

By The SE Staff - 27 Mar, 2026 - Comments: 0

Arm uncorked its first internally developed CPU chip this week, aimed squarely at the agentic AI data center market. Arm CEO Rene Haas (pictured) emphasized the CPU's power efficiency and performance/watt compared to other AI processor architectures. "We are obsessed with efficiency, and if you think about one of the biggest appeals that Arm has had over the years, it is power profile," he ... » read more

Singulated Die Test Ensures Stacked Die Quality As Power Density Rises

By Brent Bullock - 10 Mar, 2026 - Comments: 0

The accelerating rate at which the industry adopts new process nodes is posing critical test challenges. Shrinking geometries combined with increased design complexity with respect to metrics such as gates per square micrometer, plus higher operating frequencies, are leading to ever higher levels of power density. The resulting device thermal excursions are driving the need for singulated die t... » read more

Tool Matching Getting Tougher Across Test & Metrology

By Laura Peters - 10 Mar, 2026 - Comments: 0

Key Takeaways Engineers leverage both device-specific and tool-level data to identify a process "sweet spot." Tight, frequent tool-to-tool matching enables greater yield and fab flexibility. Machine learning helps capture the nuances of a tool's signature. Many people outside of the semiconductor industry wonder how humans can fabricate transistors with tens of nanometer sca... » read more

Digital Twins: The Cloud’s The Limit

By Ed Sperling - 10 Mar, 2026 - Comments: 1

Key Takeaways Digital twins are gaining traction as a way of testing different options at every step of the design-through-manufacturing flow. AI can be used to glue together disparate data types in multi-physics simulations. The promise of digital twins is huge, but multiple challenges need to be solved before it can live up to its potential. Digital twin technology is draw... » read more

Chip Industry Week In Review

By The SE Staff - 27 Feb, 2026 - Comments: 0

Big Deals and Fundings Rapidus secured US$1.7B in a new funding round from the Japanese government and the private sector to ramp 2nm production by next year. Open AI announced a $110B in new funding, with $30B from Nvidia, $30B from Softbank and $50B from Amazon. In a $100B multi-year deal, Meta will power its AI infrastructure with up to 6GW of AMD's GPUs. SambaNova and Intel ar... » read more

← Older posts Newer posts →

tag: Advantest

Chip Industry Week In Review

Chip Industry Week In Review

AI Accelerators Usher In New Era For IC Test

Untrusted Analog Components Add Risks For Critical Infrastructure

Harnessing Digital Twins And AI/ML For Smarter Semiconductor Test Optimization

Chip Industry Week In Review

Singulated Die Test Ensures Stacked Die Quality As Power Density Rises

Tool Matching Getting Tougher Across Test & Metrology

Digital Twins: The Cloud’s The Limit

Chip Industry Week In Review

Trending Articles