Chip Industry Week In Review


Intel said its new fab in Licking County, Ohio will be delayed due to financial struggles and a need to align chip production with market demand, reported the Columbus Dispatch. Construction is now estimated to be completed in 2030, with operations to start in 2030 or 2031. The company said it already has invested $3.7 billion locally. Apple plans to invest more than $500 billion in the U.S... » read more

Chip Industry Week In Review


The EU Commission approved €920 million in German State aid to support Infineon in setting up its Smart Power Fab in Dresden. Total funding for the Dresden site amounts to about €1 billion. PDF Solutions will acquire secureWISE for $130 million to expand the reach of its semiconductor manufacturing data platform, providing secure, remote access monitoring and control. Tariffs, trade, and ... » read more

Chip Industry Week In Review


Worldwide silicon wafer shipments declined nearly 2.7% to 12,266 million square inches in 2024, with wafer revenue contracting 6.5% to $11.5 billion, according to the SEMI Silicon Manufacturers Group. CSIS released a new report, “Critical Minerals and the Future of the U.S. Economy,” with detailed analysis and policy recommendations for building a secure mineral supply chain for semicond... » read more

Optimizing DFT With AI And BiST


Experts at the Table: Semiconductor Engineering sat down to explore how AI impacts design for testability, with Jeorge Hurtarte, senior director of product marketing in the Semiconductor Test Group at Teradyne; Sri Ganta, director of test products at Synopsys; Dave Armstrong, principal test strategist at Advantest; and Lee Harrison, director of Tessent automotive IC solutions at Siemens EDA. Wh... » read more

Silent Data Errors Still Slipping Through The Cracks


Silent data corruption errors in large server farms have become a major concern of cloud users, hyperscalers, processor manufacturers and the test community. Silent data errors (also called silent data corruption errors) are hardware errors that occur when an incorrect computational result from a processor core goes undetected by the system. The data is silently corrupted because neither sof... » read more

Simulation Closes Gap Between Chip Design Optimization And Manufacturability


Simulation is playing an increasingly critical and central role throughout the design-through-manufacturing flow, fusing together everything from design to manufacturing and test in order to reduce the number and cost of silicon respins. The sheer density of modern chips, combined with advanced packaging techniques like 3D stacking and heterogeneous integration, has made iterative physical p... » read more

Early Detection Of C-RES Degradation On High-Current Power Planes


Probe-card or device contactor damage can be dramatic and catastrophic, with yield dropping drastically very quickly. What is not dramatic is the hypothesized slow probe needle or contactor degradation process that might precede catastrophic failure. Such degradation is difficult to detect in the early stages, when probe cards, die, and packages continue to yield normally. A key goal is to dete... » read more

Chip Industry Week In Review


The chip industry is well on its way to hit $1 trillion in revenue by the end of its decade. Several analyst firms released 2024 annual results and 2025 predictions: Worldwide semiconductor revenue reached $626 billion in 2024, an 18% increase versus 2023, according to preliminary Gartner report. Memory revenue grew about 70%  2024 versus 2023. The firm forecasts that HBM will make up 19%... » read more

Using Test And Metrology Data For Dynamic Process Control


Advanced packaging is transforming semiconductor manufacturing into a multi-dimensional challenge, blending 2D front-end wafer fabrication with 2.5D/3D assemblies, high-frequency device characterization, and complex yield optimization strategies. These combinations are essential to improving performance and functionality, but they create some thorny issues for which there are no easy fixes. ... » read more

Screening For Known Good Interposers


Ensuring the quality of silicon and organic interposers is becoming harder as the number of signals passing through them continues to grow, fueled by more chiplets, higher processing demands, and more layers of devices assembled in a package. Interposers initially were viewed as relatively simple conduits. That perception has changed rather dramatically in recent years with the growing focus... » read more

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