The Race To Much More Advanced Packaging

By Mark LaPedus - 23 Jul, 2020 - Comments: 2

Momentum is building for copper hybrid bonding, a technology that could pave the way toward next-generation 2.5D and 3D packages. Foundries, equipment vendors, R&D organizations and others are developing copper hybrid bonding, which is a process that stacks and bonds dies using copper-to-copper interconnects in advanced packages. Still in R&D, hybrid bonding for packaging provides mo... » read more

Manufacturing Bits: July 30

By Mark LaPedus - 30 Jul, 2019 - Comments: 0

Scanning nanopore microscopes ETH Zurich has developed a new microscopy technique that can detect and analyze signals between individual cells in living organisms. The technology, called a force-controlled scanning nanopore microscope, is a new way to look at the behavior of individual cells. So far, researchers have tested the technology on rat brain tissue. It could one day be used to pro... » read more

3D NAND Metrology Challenges Growing

By Mark LaPedus - 09 Apr, 2019 - Comments: 8

3D NAND vendors face several challenges to scale their devices to the next level, but one manufacturing technology stands out as much more difficult at each turn—metrology. Metrology, the art of measuring and characterizing structures, is used to pinpoint problems and ensure yields for all chip types. In the case of 3D NAND, the metrology tools are becoming more expensive at each iteration... » read more

Manufacturing Bits: Feb. 11

By Mark LaPedus - 11 Feb, 2019 - Comments: 1

How things stick together Using a metrology technique called atomic force microscopy (AFM), Brown University has gained more insights into the theory of adhesion or how things stick together. Understanding the theory of adhesion also has some practical applications. It could pave the way towards a new class of MEMS or nanoscale devices. Nanoscale patterning is another potential application.... » read more

FinFET Metrology Challenges Grow

By Mark LaPedus - 17 May, 2018 - Comments: 1

Chipmakers face a multitude of challenges in the fab at 10nm/7nm and beyond, but one technology that is typically under the radar is becoming especially difficult—metrology. Metrology, the art of measuring and characterizing structures, is used to pinpoint problems in devices and processes. It helps to ensure yields in both the lab and fab. At 28nm and above, metrology is a straightforward... » read more

Manufacturing Bits: Oct. 18

By Mark LaPedus - 18 Oct, 2016 - Comments: 0

Measuring gooey materials The National Institute of Standards and Technology (NIST) and Thermo Fisher Scientific have devised an instrument that correlates the flow properties of “soft gooey” materials, such as gels, molten polymers and biological fluids. The instrument, called a rheo-Raman microscope, combines three instruments into one system. First, the system incorporates a Raman sp... » read more

Inside Inspection And Metrology

By Mark LaPedus - 18 Dec, 2015 - Comments: 0

Semiconductor Engineering sat down to talk about inspection, metrology and other issues with Mehdi Vaez-Iravani, vice president of advanced imaging technologies at Applied Materials. What follows are excerpts of that conversation. SE: Today, the industry is working on a new range of complex architectures, such as 3D NAND and finFETs. For these technologies, the industry is clearly struggling... » read more

Fab Issues At 7nm And 5nm

By Mark LaPedus - 23 Jul, 2015 - Comments: 2

The race toward the 7nm logic node officially kicked off in July, when IBM Research, GlobalFoundries and Samsung jointly rolled out what the companies claim are the industry’s first 7nm test chips with functional transistors. They're not alone, of course. Intel and TSMC also are racing separately to develop 7nm technology. And in the R&D labs, chipmakers also are working on technologies f... » read more

Dealing With Atoms

By Mark LaPedus - 13 Jul, 2015 - Comments: 0

Chipmakers are ramping up a new range of device architectures, such as 3D NAND and finFETs. But to enable current and future devices, IC vendors will require new breakthroughs, including tools that can process tiny structures and films, even at the atomic level. The problem? There are gaps in terms of techniques that can process chips at the atomic level. Looking to help fill part of the ... » read more

Searching For 3D Metrology

By Mark LaPedus - 19 Mar, 2015 - Comments: 3

In the previous decade, chipmakers made a bold but necessary decision to select the [getkc id="185" kc_name="finFET"] as the next transistor architecture for the IC industry. Over time, though, chipmakers discovered that the finFET would present some challenges in the fab. Deposition, etch and lithography were the obvious hurdles, but chipmakers also saw a big gap in metrology. In fact,... » read more

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