tag: AI chips

Mastering AI Chip Complexity: Your Guide to First-Pass Silicon Success
By Synopsys - 28 May, 2025 - Comments: 0

This eBook provides a resource for innovators in the fast-changing realm of AI chip development. It delves into the opportunities and challenges of designing cutting-edge AI chips and chiplets, focusing on the transition from traditional monolithic architectures to multi-die and chiplet-based solutions. The content covers essential topics such as architectural exploration, silicon design, a... » read more

Problems In Testing AI Chips
By Ed Sperling - 20 May, 2025 - Comments: 0

As AI chips get larger, it becomes much harder to test them. Today, there can be as many as 22,000 pins on a 150mm² die, but in the future that number may increase to 80,000 pins. That creates a huge challenge for the fabs and the testers. Jack Lewis, chief technologist at Modus Test, talks about the intricacies of testing these complex devices, from maintaining contact with those pins even on... » read more

New Approaches To Power Decoupling
By Bryon Moyer - 24 Oct, 2024 - Comments: 0

Decoupling capacitors have long been an important aspect of maintaining a clean power source for integrated circuits, but with noise caused by rising clock frequencies, multiple power domains, and various types of advanced packaging, new approaches are needed. Power is a much more important factor than it used to be, especially in the era of AI. “Doing an AI search consumes 10X the power t... » read more

In Situ Backpropagation Strategy That Progressively Updates Neural Network Layers Directly in HW (TU Eindhoven)
By Technical Paper Link - 16 Jul, 2024 - Comments: 0

A new technical paper titled "Hardware implementation of backpropagation using progressive gradient descent for in situ training of multilayer neural networks" was published by researchers at Eindhoven University of Technology. Abstract "Neural network training can be slow and energy-expensive due to the frequent transfer of weight data between digital memory and processing units. Neuromorp... » read more

Making Tradeoffs With AI/ML/DL
By Ann Mutschler - 11 May, 2023 - Comments: 0

Machine learning, deep learning, and AI increasingly are being used in chip design, and they are being used to design chips that are optimized for ML/DL/AI. The challenge is understanding the tradeoffs on both sides, both of which are becoming increasingly complex and intertwined. On the design side, machine learning has been viewed as just another tool in the design team's toolbox. That's s... » read more

A crossbar array of magnetoresistive memory devices for in-memory computing
By Technical Paper Link - 14 Jan, 2022 - Comments: 0

Samsung has demonstrated the world’s first in-memory computing technology based on MRAM. Samsung has a paper on the subject in Nature. This paper showcases Samsung’s effort to merge memory and system semiconductors for next-generation artificial intelligence (AI) chips. Abstract "Implementations of artificial neural networks that borrow analogue techniques could potentially offer low-po... » read more

Architectural Considerations For AI
By Brian Bailey - 24 Jun, 2021 - Comments: 2

Custom chips, labeled as artificial intelligence (AI) or machine learning (ML), are appearing on a weekly basis, each claiming to be 10X faster than existing devices or consume 1/10 the power. Whether that is enough to dethrone existing architectures, such as GPUs and FPGAs, or whether they will survive alongside those architectures isn't clear yet. The problem, or the opportunity, is that t... » read more

The Benefits Of Using Embedded Sensing Fabrics In AI Devices
By Moortec - 11 Nov, 2020 - Comments: 0

AI chips, regardless of the application, are not regular ASICs and tend to be very large, this essentially means that AI chips are reaching the reticle limits in-terms of their size. They are also usually dominated by an array of regular structures and this helps to mitigate yield issues by building in tolerance to defect density due to the sheer number of processor blocks. The reason behind... » read more

Variables Complicate Safety-Critical Device Verification
By Ann Mutschler - 01 Jul, 2020 - Comments: 0

The inclusion of AI chips in automotive and increasingly in avionics has put a spotlight on advanced-node designs that can meet all of the ASIL-D requirements for temperature and stress. How should designers approach this task, particularly when these devices need to last longer than the applications? Semiconductor Engineering sat down to discuss these issues with Kurt Shuler, vice president of... » read more

Startup Funding: March 2020
By Jesse Allen - 08 Apr, 2020 - Comments: 0

Dedicated AI hardware, quantum computing, and avionics startups shined in March. Here's a look at seventeen startups, which raised a collective $525M. The avionics sector soared thanks to Lilium and its electric vertical takeoff jet. Quantum computing was another hot area, with three companies bringing in ~$88M together. Plus, chip design management, two companies developing AR glasses, and how... » read more

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