Chip Industry Technical Paper Roundup: May 26


New technical papers recently added to Semiconductor Engineering’s library: Technical Paper Research Organizations SHIP: SRAM-Based Huge Inference Pipelines for Fast LLM Serving 🔗 Nvidia, Groq Not All Thoughts Need HBM: Semantics-Aware Memory Hierarchy for LLM Reasoning 🔗 USC, University of Wisconsin-Madison Water-based, large-scale transfer of... » read more

A Deionized Water-Based Large-Scale Transfer Process For 2D Materials Grown on Sapphire (AMO, RWTH, Aixtron)


A new technical paper, "Water-based, large-scale transfer of 2D materials grown on sapphire substrates," was published by researchers at AMO GmbH, RWTH Aachen University, and AIXTRON SE. Abstract "Two-dimensional materials (2DMs) hold significant potential for future electronics, as demonstrated by high-performing devices for sensing, optics, and electronics. However, scalable growth tech... » read more

Chip Industry Week In Review


The EU’s tariffs on semiconductors will not exceed 15%, according to Trump’s latest trade deal. In addition, the EU committed to purchasing at least $40 billion worth of U.S. AI chips as well as other investments. [FAQ is here.] Lifelines for Intel: Intel inked a deal to sell the U.S. government a 10% non-voting equity stake in its business, worth $8.9 billion. The stake will be fun... » read more

Chip Industry Technical Paper Roundup: Dec. 23


New technical papers recently added to Semiconductor Engineering’s library: [table id=394 /] Find all technical papers here. » read more

Promising Materials Beyond Silicon (TI, AIXTRON, imec)


A new technical paper titled "Future materials for beyond Si integrated circuits: a Perspective" was published by researchers at Texas Instruments, AIXTRON SE and imec. Abstract: "The integration of novel materials has been pivotal in advancing Si-based devices ever since Si became the preferred material for transistors, and later, integrated circuits. New materials have rapidly been adopte... » read more

Zero-Bias Power-Detector Circuits based on MoS2 Field-Effect Transistors on Wafer-Scale Flexible Substrates


Abstract: "We demonstrate the design, fabrication, and characterization of wafer-scale, zero-bias power detectors based on two-dimensional MoS2 field effect transistors (FETs). The MoS2 FETs are fabricated using a wafer-scale process on 8 μm thick polyimide film, which in principle serves as flexible substrate. The performances of two CVD-MoS2 sheets, grown with different processes and showi... » read more