tag: Aldec

Blog Review: June 7
By Jesse Allen - 07 Jun, 2017 - Comments: 0

Cadence's Paul McLellan listens in on Jeff Bier's Embedded Vision Summit keynote, where he argues the cost and power consumption of vision computing will decrease by about 1000X in the next three years. Synopsys' Sean Safarpour points to three reasons formal has grown in the last ten years to become a standard part of the verification toolbox. Mentor's Matthew Balance checks out the abili... » read more

Toward Continuous HW-SW Integration
By Ann Mutschler - 25 May, 2017 - Comments: 0

Hardware is only as good as the software that runs on it, and as system complexity grows that software is lagging behind. The way to close that gap is to improve the [getkc id="100" kc_name="methodology"] for developing that software in the first place. That includes making sure updates are verified and tested before being pushed out to devices, adding the same kinds of detailed checks that ... » read more

It’s Show Time
By Henry Chan - 25 May, 2017 - Comments: 0

It’s been a busy season. The weather has warmed here in the desert and as the trees and greenery enliven in spring, The whole industry is bursting with activity. From DVCon to the International Symposium on FPGAs in the United States to Embedded World and CTIC in Europe, there have been a number of important developments in verification, embedded systems, and DO-254. The DVCon U.S. Confere... » read more

Moore’s Law: Toward SW-Defined Hardware
By Ed Sperling - 15 May, 2017 - Comments: 2

Pushing to the next process node will continue to be a primary driver for some chips—CPUs, FPGAs and some ASICS—but for many applications that approach is becoming less relevant as a metric for progress. Behind this change is a transition from using customized software with generic hardware, to a mix of specialized, heterogeneous hardware that can achieve better performance with less ene... » read more

The Week In Review: Design
By Jesse Allen - 05 May, 2017 - Comments: 0

Imagination has put the MIPS embedded processor and Ensigma mobile connectivity groups up for sale, refocusing on graphics after last month's announcement that Apple would no longer use the company's GPU IP. Imagination also began formal dispute resolution procedures with Apple. Tools Synopsys released new versions of its HSPICE, FineSim and CustomSim circuit simulation products, adding n... » read more

What’s Next In Neural Networking?
By Ann Mutschler - 03 May, 2017 - Comments: 0

Faster chips, more affordable storage, and open libraries are giving neural network new momentum, and companies are now in the process of figuring out how to optimize it across a variety of markets. The roots of neural networking stretch back to the late 1940s with Claude Shannon’s Information Theory, but until several years ago this technology made relatively slow progress. The rush towar... » read more

Design Complexity Drives New Automation
By Ann Mutschler - 27 Apr, 2017 - Comments: 0

As design complexity grows, so does the need for every piece in the design flow—hardware, software, IP, as well as the ecosystem — to be tied together more closely. At one level, design flow capacity is simply getting bigger to accommodate massive [getkc id="185" kc_name="finFET"]-class designs. But beyond sheer size, there are new interactions in the design flow that place much more emp... » read more

Software Driven Test Of FPGA Prototype
By Krzysztof Szczur - 27 Apr, 2017 - Comments: 0

Most everyone would agree how important FPGA prototyping is to test and validate an IP, sub-system, or a complete SoC design. Before the design is taped-out it can be validated at speeds near real operating conditions with physical peripherals and devices connected to it instead of simulation models. At the same time, these designs are not purely hardware, but these days incorporate a significa... » read more

The Week In Review: Design
By Jesse Allen - 14 Apr, 2017 - Comments: 0

M&A Synapse Design acquired Asilicon, a design services firm based in Ranchi Jharkhand, India. Through the acquisition, Synapse Design adds a second design center in India and gains an additional 80 engineers. "The focus of the Ranchi office will be to provide lower-cost offshore design center services for our customer's designs targeting 7- and 10-nm process technology," said Satish Bag... » read more

Blog Review: April 5
By Jesse Allen - 05 Apr, 2017 - Comments: 0

In a video, Cadence's Megha Daga digs into the different architectural layers present in convolutional neural networks and how they contribute to object detection and classification in a real world scenario. Mentor's Mike Santarini argues that as things become increasingly connected, the stakes of bad design and bad verification are higher than they've ever been. Synopsys' Robert Vamosi w... » read more

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