tag: Altera

Programming The Future
By Joanne Itow - 21 Mar, 2013 - Comments: 0

By Joanne Itow After Achronix and Altera made significant announcements involving FPGA products and Intel’s advanced manufacturing technology, I decided to take a closer look at some of the market numbers involved. Just to recap, in February, Achronix announced the company began shipping the first FPGA device manufactured on Intel’s 22nm, Tri-Gate process technology. One week later, Altera... » read more

The Week In Review: Feb. 25
By Ed Sperling - 25 Feb, 2013 - Comments: 0

By Mark LaPedus Is China set to bail out a U.S. government technology darling? Two Chinese automotive companies, Geely and Dongfeng Motor, are reported to have bid between $200 million and $350 million for a majority stake in Fisker, the maker of plug-in hybrid cars. If that happens Fisker—which has $192 million in U.S. federal government loan guarantees—could be headed to China, according... » read more

Stacked Die From A Networking Angle
By Mark LaPedus - 24 Jan, 2013 - Comments: 1

By Mark LaPedus The first wave of 2.5D chips using silicon interposers are trickling out in the marketplace.FPGA vendor Xilinx was the first chipmaker to ship a 2.5D device, and Altera, Cisco, Huawei and IBM recently have talked about their respective 2.5D chip developments. Generally, Altera and Xilinx have taken a somewhat identical and straightforward approach. The two companies are sepa... » read more

Foundry Landscape Changes In 3D
By Mark LaPedus - 13 Dec, 2012 - Comments: 0

By Mark LaPedus Over the last year, leading-edge silicon foundries announced their new and respective strategies in the emerging 2.5D/3D chip arena. The ink is barely dry and now the foundry landscape is changing. One new vendor, Tezzaron Semiconductor, is entering the market. The 3D DRAM supplier plans to provide select 2.5D/3D foundry services within its recently acquired fab in Austin, T... » read more

Virtual IDM Progress Report
By Ed Sperling - 06 Dec, 2012 - Comments: 0

By Ed Sperling Complexity, tight power budgets, disaggregation of the supply chain and market fragmentation are conspiring to force much tighter partnerships among companies that develop different pieces of an SoC, as well as those that collaborate on even larger systems. This confluence of factors has forced the rules for how companies work together to be rewritten, but even within that frame... » read more

Don’t miss Fully-Depleted Tech Symposium during IEDM (SF)
By Various Writers - 04 Dec, 2012 - Comments: 0

Posted by Adele Hars, Editor-in-Chief, Advanced Substrate News ~  ~ If you want to cut through the noise surrounding the choices for 28nm and beyond, an excellent place to start is the SOI Consortium’s Fully Depleted Technology Symposium. As a member of the design and manufacturing communities, this is your chance to see and hear what industry leaders are actually doing. Planar? F... » read more

Design For Power
By Ed Sperling - 11 Oct, 2012 - Comments: 0

By Ed Sperling Figuring out a single power budget and mapping out what has become known as holistic power intent for an SoC sounds great on paper, but reality has turned out to be somewhat different. While system architects still call the shots on how a chip is designed, there is a lot more information flowing in all directions further down the design chain these days. Unlike functionality,... » read more

The Good And Bad Of Models
By Ed Sperling - 27 Sep, 2012 - Comments: 0

By Ann Steffora Mutschler Driven by fierce competition and the fact that socket decisions are made long before silicon is manufactured, semiconductor companies today ship models and virtual prototypes to their OEMs very early in hopes of locking in the socket. Admittedly, this has been happening for some time, but due to complexity and the need for flexibility of models and virtual platf... » read more

Experts at the Table: Stacking the Deck
By Ed Sperling - 23 Aug, 2012 - Comments: 0

By Ann Steffora Mutschler System-Level Design sat down to discuss challenges to 3D-IC adoption with Samta Bansal, product marketing for applied silicon realization in strategy and market development at Cadence; Carey Robertson, product marketing director at Mentor Graphics; Karthik Chandrasekar, member of technical staff in IC Design at Altera; and Herb Reiter, president of EDA2ASIC Consulting... » read more

Experts at the Table: Stacking the Deck
By Ed Sperling - 10 Aug, 2012 - Comments: 0

By Ann Steffora Mutschler System-Level Design sat down to discuss challenges to 3D adoption with Samta Bansal, product marketing for applied silicon realization in strategy and market development at Cadence; Carey Robertson, product marketing director at Mentor Graphics; Karthik Chandrasekar, member of technical staff in IC Design at Altera; and Herb Reiter, president of Eda2Asic Consulting. ... » read more

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