Chiplets Enter The Supercomputer Race

By Mark LaPedus - 17 Mar, 2022 - Comments: 0

Several entities from various nations are racing each other to deliver and deploy chiplet-based exascale supercomputers, a new class of systems that are 1,000x faster than today’s supercomputers. The latest exascale supercomputer CPU and GPU designs mix and match complex dies in advanced packages, adding a new level of flexibility and customization for supercomputers. For years, various na... » read more

Why Comparing Processors Is So Difficult

By Brian Bailey - 10 Mar, 2022 - Comments: 2

Every new processor claims to be the fastest, the cheapest, or the most power frugal, but how those claims are measured and the supporting information can range from very useful to irrelevant. The chip industry is struggling far more than in the past to provide informative metrics. Twenty years ago, it was relatively easy to measure processor performance. It was a combination of the rate at ... » read more

Robots Become More Useful In Factories

By John Koon - 10 Mar, 2022 - Comments: 0

Most people associate factory automation with large robotic machines, such as those that weld automobile chassis on assembly lines. But as prices drop and technology improves, robots are being deployed for smaller and more varied tasks, and they are getting better at all of them. Inside of factories, robots can significantly improve output, consistency, and reliability. They can work around ... » read more

Week In Review: Manufacturing, Test

By Mark LaPedus - 04 Mar, 2022 - Comments: 0

Packaging ASE, AMD, Arm, Google, Intel, Meta, Microsoft, Qualcomm, Samsung, and TSMC have announced the formation of a consortium that will establish a die-to-die interconnect standard and foster an open chiplet ecosystem. The founding companies also ratified the UCIe specification, an open industry standard developed to establish a standard interconnect at the package level. The UCIe 1.0 s... » read more

Week In Review: Design, Low Power

By Jesse Allen - 04 Mar, 2022 - Comments: 0

Tools & IP Imperas Software introduced the RISC-V Verification Interface (RVVI). The open standard and methodology can be adapted to any configuration permitted within the RISC-V specifications. RVVI defines interfaces between RTL, reference model, and testbench for RISC-V design verification, with the aim of making RISC-V processor DV reusable. It supports multi-hart, superscalar, and out... » read more

Machine Learning Showing Up As Silicon IP

By Bryon Moyer - 03 Mar, 2022 - Comments: 0

New machine-learning (ML) architectures continue to appear. Up to now, each new offering has been implemented in a chip for sale, to be placed alongside host processors, memory, and other chips on an accelerator board. But over time, more of this technology could be sold as IP that can be integrated into a system-on-chip (SoC). That trend is evident at recent conferences, where an increasing... » read more

Building Multipurpose Systems With Dynamic Function Exchange Part Three: Tools For Deploying DFX

By Ed Rebello - 03 Mar, 2022 - Comments: 0

In our previous two articles, we introduced you to the concept of Dynamic Function Exchange (DFX), a design approach that dynamically reallocates unused system resources to other tasks. We also introduced you to some techniques for bundling and managing your DFX resources. In this article, we will discuss some of the adaptive computing tools that make DFX possible. As part of its investment ... » read more

Open RAN Direct RF Sampling Radio Transceiver Architectures For Massive MIMO

By AMD - 02 Mar, 2022 - Comments: 0

With the exponential increase in wireless traffic, mobile networks are transformed into more software-driven, virtualized, flexible, intelligent, and energy efficient systems. These trends have stimulated significant change in the core network with the advent of software defined networks (SDN) and network functions virtualization (NFV), which have enabled building more agile and less expensive ... » read more

Which Processor Is Best?

By Ed Sperling - 01 Mar, 2022 - Comments: 2

Intel's embrace of RISC-V represents a landmark shift in the processor world. It's a recognition that no single company can own the data center anymore, upending a revenue model that has persisted since the earliest days of computing. Intel gained traction in that market in the early 1990s with the explosion of commodity servers, but its role is changing as processors become more customized and... » read more

Data Center Architectures In Flux

By Ann Mutschler - 24 Feb, 2022 - Comments: 0

Data center architectures are becoming increasingly customized and heterogeneous, shifting from processors made by a single vendor to a mix of processors and accelerators made by multiple vendors — including system companies' own design teams. Hyperscaler data centers have been migrating toward increasingly heterogeneous architectures for the past half decade or so, spurred by the rising c... » read more

← Older posts Newer posts →

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

New AI Processors Architectures Balance Speed With Efficiency

Hot Chips 24: Large language models ratchet up pressure for sustainable computing and heterogeneous integration; data management becomes key differentiator.