Blog Review: Sept. 17

By Ed Sperling - 17 Sep, 2014 - Comments: 0

Ansys’ Benoit Debbaut looks at the Pitch drop experiment, which was started in 1927 (yes, that date is correct) to observe the excruciatingly slow movement of a thick liquid weighted down by gravity. Since inception, a total of nine drops have fallen. So when will the tenth drop fall? Place your bets...when you get around to it. Mentor’s Matthew Ballance highlights an interesting challe... » read more

Making Chips Run Faster

By Ed Sperling - 11 Sep, 2014 - Comments: 3

For all the talk about low power, the real focus of most chipmakers is still performance. The reality is that OEMs might be willing to sacrifice increasing performance for longer battery life, but they will rarely lower performance to reach that goal. This is more obvious for some applications than others. A machine monitor probably isn’t the place where performance will make much of a dif... » read more

Design For IoT

By Ann Mutschler - 11 Sep, 2014 - Comments: 0

In our already mind-bogglingly connected world where you can control your BMW with a Samsung smartwatch or monitor and pay your parking meter with a credit card on your smartphone, the semiconductor design community is mulling over the opportunities from design kits to embedded software as far as the best ways to equip design teams for the [getkc id="76" comment="Internet of Things"] (IoT) era.... » read more

Are We Headed For A Power Wall?

By Ann Mutschler - 11 Sep, 2014 - Comments: 0

A common theme in semiconductor design circles today are the many power reduction techniques available to engineers to bring the power down in their devices. While power gating and other techniques are effective today, it does lead to questions about how long they will continue providing a benefit. Anand Iyer, director of product marketing for [getentity id="22016" e_name="Calypto"], believe... » read more

Blog Review: Aug. 13

By Ed Sperling - 13 Aug, 2014 - Comments: 0

Cadence’s Richard Goering interviews Kathryn Kranen about the acquisition of her company, along with the business of formal verification. Interesting tidbit: The combined company has more than 50% market share in formal. Mentor’s John Day looks at Volkswagen’s upcoming all-electric Golf that will go on sale later this year in the United States. The new twist: VW has struck a deal with ... » read more

IP Reaches Back To Established Nodes

By Ann Mutschler - 07 Aug, 2014 - Comments: 0

Driven by the [getkc id="76" kc_name="IoT"] and wearable market opportunity, [getkc id="81" kc_name="SoC"] developers are shifting backward to established nodes, and what is learned at the leading-edge nodes is being leveraged in reverse as IP is ported backward to improve functionality. [getkc id="43" kc_name="IP"] certainly can be improved to work faster at older geometries, stressed Krish... » read more

Established Nodes Getting New Attention

By Ed Sperling - 07 Aug, 2014 - Comments: 0

As the price of shrinking features increases below 28nm, there has been a corresponding push to create new designs at established nodes using everything from near-threshold computing to back biasing and mostly accurate analog sensors. The goals of power, performance and cost haven’t changed, but there is a growing realization among many chipmakers that the formula can be improved upon with... » read more

Changing The Meaning Of Sign-Off

By Muhammad Zakir - 07 Aug, 2014 - Comments: 0

Chip development teams are faced with an ever-increasing number of power integrity and reliability challenges these days, especially as designs adopt FinFET technology. Even those with the most thorough sign-off checks often encounter unexpected surprises that quickly turn into tape-out hurdles, or worse yet, extensive re-design. The best way to avoid this scenario and ensure a smoother sign-of... » read more

Test Becomes Power-Aware

By Ann Mutschler - 07 Aug, 2014 - Comments: 0

Power-aware test plans are changing, becoming far more extensive than the minimalist plans that were common just a few years ago. In the past would determine if they could power their design up, power it down, then they’d declare it done. “Sometimes they would find they could power it up and power it down once, but they couldn’t power it up a second time because they’d forgotten to ... » read more

IP And FinFETs At Advanced Nodes

By Ed Sperling - 31 Jul, 2014 - Comments: 2

Semiconductor Engineering sat down to discuss IP and finFETs at advanced nodes with Warren Savage, president and CEO of IPextreme; Aveek Sarkar, vice president of engineering and product support at Ansys-Apache; Randy Smith, vice president of marketing at Sonics, and Bernard Murphy, CTO of Atrenta. What follows are excerpts of that conversation. SE: It’s harder for a fabless semiconductor ... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

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