Established Nodes Getting New Attention


As the price of shrinking features increases below 28nm, there has been a corresponding push to create new designs at established nodes using everything from near-threshold computing to back biasing and mostly accurate analog sensors. The goals of power, performance and cost haven’t changed, but there is a growing realization among many chipmakers that the formula can be improved upon with... » read more

Changing The Meaning Of Sign-Off


Chip development teams are faced with an ever-increasing number of power integrity and reliability challenges these days, especially as designs adopt FinFET technology. Even those with the most thorough sign-off checks often encounter unexpected surprises that quickly turn into tape-out hurdles, or worse yet, extensive re-design. The best way to avoid this scenario and ensure a smoother sign-of... » read more

Blog Review: Aug. 6


Mentor’s Colin Walls takes a look at bad behavior—the undefined kind that you get from doing C programming wrong and adding too much complexity up front. Cadence’s Brian Fuller interviews his colleague about what engineers need to know in regards to finFETs, advanced nodes and parasitic extraction. Short answer: Plenty. Synopsys’ Mick Posner is building FPGA prototype boards and... » read more

System-Aware SoC Power, Noise And Reliability Sign-Off


In globally competitive markets for mobile, consumer and automotive electronic systems, the critical success factors are power consumption, performance and reliability. To manage these conflicting requirements, design teams consider multiple options, including the use of advanced process technology nodes — especially FinFET-based devices. These advanced technology nodes allow chips to operate... » read more

IP And FinFETs At Advanced Nodes


Semiconductor Engineering sat down to discuss IP and finFETs at advanced nodes with Warren Savage, president and CEO of IPextreme; Aveek Sarkar, vice president of engineering and product support at Ansys-Apache; Randy Smith, vice president of marketing at Sonics, and Bernard Murphy, CTO of Atrenta. What follows are excerpts of that conversation. SE: It’s harder for a fabless semiconductor ... » read more

Blog Review: July 30


Mentor’s Colin Walls looks at a free collaborative online tool called codepad, which can be used for compiling, interpreting and executing code quickly. Free is good—sometimes. Cadence’s Brian Fuller followed a recent panel on high-speed, cross-fabric interface design, which focused on why designers need to consider chip, package and board to ensure signal and power integrity. So what... » read more

Reversing Course, With A Twist


Semiconductor Engineering is running an extended series of articles that examine the assertion that the end of Moore’s Law will have profound implications for the entire semiconductor, EDA and IP industries. Part one of this article, which focuses on the EDA industry, addressed the question about who was going to pay for future development of EDA tools for the latest production nodes. The ind... » read more

Blog Review: July 23


Mentor’s John Day says that within the decade you will be able to contact a real person from your car. Hopefully that doesn't mean marketing people will be able to contact you while you’re stuck in traffic. Cadence’s Brian Fuller says the future of EDA in the automotive market isn’t just about chips. Think security, software and cost reduction. It’s not just SoCs that are going ... » read more

IP And FinFETs At Advanced Nodes


Semiconductor Engineering sat down to discuss IP and finFETs at advanced nodes with Warren Savage, president and CEO of IPextreme; Aveek Sarkar, vice president of engineering and product support at Ansys-Apache; Randy Smith, vice president of marketing at Sonics, and Bernard Murphy, CTO of Atrenta;. What follows are excerpts of that conversation. SE: What happens with the next revs of finFET... » read more

Blog Review: July 16


Mentor’s Scott Salzwedel describes a conversation that could very well happen in the future and it raises an interesting idea. As medical electronics proliferate, will emergency medical teams need to include out systems engineers? Cadence’s Brian Fuller has a summer engineering project that resembles the Bridge Over the River Kwai. He should win an Oscar for this one. Ansys’ Bill ... » read more

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