Blog Review: July 16

Emergency systems engineering; Oscar time; exoskeletons; 7nm; DVCon global; Erlangers; parallelism; solar education; DRAM shipments.


Mentor’s Scott Salzwedel describes a conversation that could very well happen in the future and it raises an interesting idea. As medical electronics proliferate, will emergency medical teams need to include out systems engineers?

Cadence’s Brian Fuller has a summer engineering project that resembles the Bridge Over the River Kwai. He should win an Oscar for this one.

Ansys’ Bill Vandermark details the top five engineering articles of the week. Check out the robotic exoskeletons. This is really good use of technology.

Synopsys’ Mick Posner has posted a picture of nasty bike accident. Watch out for hidden potholes.

ARM’s Greg Yeric points to IBM’s announcement that it will invest $3 billion in semiconductor research at 7nm and beyond. That may seem like a lot of money, but wait until you see the price tag for fully equipping a 7nm fab.

Independent blogger Gaurav Jalan points out that DVCon has gone global, notably to Munich and Bangalore. Munich is concurrent with Oktoberfest, Bangalore is in early fall when the weather is at its best. They’ve certainly figured out the best time to hold these conferences.

Do you speak Erlang? How about Forth? Mentor’s Colin Walls is taking a survey of embedded programmers. What’s in your kernel?

Cadence’s Richard Goering hits on an interesting trend in EDA—adding parallelism into established methodologies to improve performance. This has multiple benefits—keeping pace with rising complexity, reducing time to market, and allowing tools vendors to extend the life of their tools for many more generations without worrying about obsolescence.

Semico Research’s Tony Massimini examines the sensor fusion market, which is undergoing rapid consolidation as giant electronics companies gobble up smaller ones. It looks as if the IoT has started a feeding frenzy.

Mentor’s Dennis Brophy provides new details about the new Accellera announcement for UVM 1.2, which was years in the making.

ARM has been running a contest to see who contributes the most to its community site and which content has the most viewership. ARM’s Brad Nemire highlights some interesting ecosystem dynamics in here, particularly the most-viewed partners and content.

Ansys’ Robert Harwood looks at aircraft industry innovation, including composite materials and 3D printing applications.

Cadence’s Steven Lewis points to a new educational award given to Carnegie Mellon student Shupeng Sun for speeding up circuit block validation. Guess he won’t have trouble finding a job after graduation—or funding.

And in case you missed last week’s Low Power-High Performance newsletter, here are some standout blogs:

Executive Editor Ann Mutschler questions whether more education is needed for widespread adoption of solar.

Rambus’ Loren Shalinsky zeroes in on a discrepancy between semiconductor and DRAM shipments.

Ansys-Apache’s Aveek Sarkar explains why electromigration and ESD become much bigger challenges with 3D transistors.

Atrenta’s Mark Baker and Ravindra Aneja have pulled together a detailed chart along with an explanation of how to manage constraints from RTL through post-layout.

Synopsys’ Rita Horner contends design teams must implement PCIe solutions that meet both active and low idle power requirements.

ARM’s Zach Shelby writes that we’ve only scratched the surface for useful, well-connected devices.

And Cadence’s Brian Fuller notes that application-specific designs are just the beginning.

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