tag: Apache Design

Stacking The Deck
By Matt Elmore - 12 Jul, 2012 - Comments: 0

By Matt Elmore Can we finally say that 3D-IC design has emerged from the realm of theory and research to actual commercial implementation? Xilinx recently announced initial shipments of its Virtex-7 H580T FPGA, described as “The world’s first 3D heterogeneous all programmable product.” The benefits of 3D implementation are many, as are its challenges. One of the hottest 3D-IC topics t... » read more

Experts At The Table: Pain Points
By Ed Sperling - 12 Jul, 2012 - Comments: 0

By Ed Sperling Low-Power/High-Performance Engineering sat down with Vinod Kariat, a Cadence fellow; Premal Buch, vice president of software engineering at Altera; Vic Kulkarni, general manager of Apache Design; Bernard Murphy, CTO at Atrenta, and Laurent Moll, CTO at Arteris. What follows are excerpts of that conversation. LPHP: Where will the pain points be going forward? Kariat: 20nm is... » read more

Power Shift
By Ed Sperling - 14 Jun, 2012 - Comments: 0

By Ed Sperling For the past decade, most of the real gains in energy efficiency were developed for chips inside mobile electronics because of the demand for longer battery life. Dark silicon now represents the majority of mobile devices, multiple power islands are commonplace to push many functions into deep sleep, and performance is usually the secondary concern for most applications. Whil... » read more

New Reliability Issues
By Arvind Vel - 14 Jun, 2012 - Comments: 0

By Arvind Shanmugavel Reliability of ICs is a topic of growing concern with every technology node migration. With the onset of the 20nm process node from different foundries, reliability verification has taken center stage in design kits—and for good reason. Reliability margins have continued to decrease and have reached an inflection point at the 20nm node. The design and EDA communities ha... » read more

Tech Talk: Power Issues Ahead
By Ed Sperling - 31 May, 2012 - Comments: 0

Aveek Sarkar, vice president of technology and support at ANSYS Apache, talks with Low-Power Engineering about growing concerns over electrostatic discharge, electromigration, the impact of stacked die, and the need for power and thermal models. [youtube vid=-7TtszsuZP0] » read more

Old Problem, New Solutions
By Ed Sperling - 10 May, 2012 - Comments: 0

By Ann Steffora Mutschler Electromigration (EM) and electrostatic discharge (ESD) may not be new, but design design sophistication and tiny wires are demanding that engineering teams take a fresh look and utilize new tools to lesson the impacts of damaging electrical events. “These are certainly not new phenomenon,” said Carey Robertson, director of product marketing for Calibre at Ment... » read more

New Power Standards Ahead
By Ed Sperling - 10 May, 2012 - Comments: 0

By Ed Sperling Standards groups are beginning to look at power and other physical effects much more seriously in the wake of the dueling power formats—UPF and CPF—that have caused angst across the design industry. To put it in perspective, when CPF and UPF were first introduced power was something of an afterthought in design. At 65nm it ceased to be something that could be dealt with l... » read more

The Next Steps
By Aveek Sarkar - 10 May, 2012 - Comments: 0

By Aveek Sarkar Remaining competitive in today’s semiconductor market means IC designers must meet performance, power and price targets for their design, regardless of the end application. Meeting these mutually conflicting goals requires enlisting the use of several architectural and design techniques, including three-dimensional (3D) or stacked-die architectures that can help meet perfo... » read more

Power Becomes Bigger Issue In Stacked Die
By Ed Sperling - 10 May, 2012 - Comments: 0

By Ed Sperling Concern over getting the heat out of stacked die is well defined, even if the current raft of existing and proposed solutions ranges from ineffective to exotic and expensive. What is less well understood is how to plan for and manage power inside of stacked die. While power and heat frequently go hand in hand—where there is heat there is almost always power dissipation—t... » read more

Reliability Concerns Grow
By Ed Sperling - 05 Apr, 2012 - Comments: 0

By Ed Sperling Knowing when to signoff on an IC design has always been as much art as science, matching engineering experience with managed risk. As ICs become more complex, however, even the most advanced chip companies are getting things wrong. Some of this can be fixed through software and some of it can be tweaked with programmable firmware. But some of it may have to be fixed in the ne... » read more

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