tag: Apache Design

Power, Applications Drive New Thinking On System Planning
By Ed Sperling - 05 Apr, 2012 - Comments: 0

By Ann Steffora Mutschler Throwing out the term ‘application-driven power-aware design methodology’ may sound like gobbledygook to some, but this concept is keeping many technologists awake at night—especially considering video games that heat iPads to 100+ degrees centigrade (near melting). The problem is very real, and potentially painful in more ways than one. The iPad example, al... » read more

Reliability Verification For Smart ICs
By Arvind Vel - 05 Apr, 2012 - Comments: 0

By Arvind Shanmugavel The electronic brains behind today’s advanced systems are smart ICs, paving the way for consumer electronics, energy, biomedical, automotive and avionics industries. Power efficiency and system integration are keys to the success of these smart systems. The IC industry has swiftly responded with state-of-the-art low-power techniques and chip integration initiatives f... » read more

PathFinder Solution For Full-Chip IC ESD Integrity
By Various Writers - 05 Apr, 2012 - Comments: 0

This paper describes how PathFinder helps designers meet ESD guidelines and identify “weak” areas of the design (layout or circuit) most vulnerable to ESD failures. It also demonstrates how PathFinder can be used for early prototyping and design exploration, especially when clamp cells are inserted inside the core region of the chip. To download this white paper, click here. » read more

The Trouble With Power Models
By Ed Sperling - 08 Mar, 2012 - Comments: 0

By Ed Sperling Talk with any large systems vendor about power modeling and, with very few exceptions, they’re still using a mix of spreadsheets and lower-level models—no matter how far along they are in ESL adoption and in modeling other parts of an IC. Power has crept up on even the biggest companies, which have never really figured out how to implement it into their design flows. For ... » read more

Avoiding Chip Melt
By Ed Sperling - 08 Mar, 2012 - Comments: 1

By Ann Steffora Mutschler Assertions. Just the term conjures images of writing boring lines of code to feed into a simulator. But for engineering teams working at the 40nm node, the pain of making sure their verification is complete and accurate is real—and so is the potential for literally melting silicon if something goes wrong. With this in mind, ‘boring’ goes out the window and gets ... » read more

Pathfinding For Power And Heat
By Ed Sperling - 02 Mar, 2012 - Comments: 0

By Ed Sperling There are many ways to measure power and heat in an IC, and each one of them adds tremendous value to a design. But there are still holes, and those holes are just beginning to get filled. Power and heat have emerged as two of the most persistent problems in advanced designs, and there is no single or simple way to tackle either of them. Nevertheless, there is at least progre... » read more

Experts At The Table: Low-Power Verification
By Ed Sperling - 24 Feb, 2012 - Comments: 0

By Ed Sperling Low-Power Engineering sat down to discuss the problems of identifying and verifying power issues with Barry Pangrle, solutions architect for low-power design at Mentor Graphics; Krishna Balachandran, director of low-power verification marketing at Synopsys; Kalar Rajendiran, senior director of marketing at eSilicon; Will Ruby, senior director of technical sales and support at Ap... » read more

Experts At The Table: Low-Power Verification
By Ed Sperling - 17 Feb, 2012 - Comments: 0

Low-Power Engineering sat down to discuss the problems of identifying and verifying power issues with Barry Pangrle, solutions architect for low-power design at Mentor Graphics; Krishna Balachandran, director of low-power verification marketing at Synopsys; Kalar Rajendiran, senior director of marketing at eSilicon; Will Ruby, senior director of technical sales and support at Apache Design; and... » read more

Step Away From the Spreadsheet
By Ed Sperling - 09 Feb, 2012 - Comments: 0

By Ann Steffora Mutschler Engineers today spend more than a quarter of their time trying to meet power specifications. A survey of more than 700 engineers by Calypto illustrates just how important and time-consuming power management is today for engineering teams. As consumer devices grow ever more complex, the need to deal with, analyze and optimize power at not just the RTL but at the sys... » read more

Experts At The Table: Low-Power Verification
By Ed Sperling - 09 Feb, 2012 - Comments: 0

Low-Power Engineering sat down to discuss the problems of identifying and verifying power issues with Barry Pangrle, solutions architect for low-power design at Mentor Graphics; Krishna Balachandran, director of low-power verification marketing at Synopsys; Kalar Rajendiran, senior director of marketing at eSilicon; Will Ruby, senior director of technical sales and support at Apache Design; and... » read more

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