IP Subsystems Are Nothing New

By Kurt Shuler - 28 Apr, 2011 - Comments: 0

By Kurt Shuler I’ve been hearing the term “IP subsystem” lately, and it seems to be the latest newfangled buzz word in the SoC semiconductor and IP industry, second only to “virtualization.” Much of the context for this growing interest in IP subsystems has been inspired from the work of Rich Wawrzyniak in his Semico Research report, “IP Subsystems: The Next IP Market Paradigm - Oc... » read more

ARM’s Race

By Ed Sperling - 05 Nov, 2010 - Comments: 0

Prior to the Synopsys acquisition of Virage Logic, Synopsys seemed to have an almost exclusive relationship with ARM. Since then, Cadence and Mentor Graphics have both been cutting deals with ARM for support of its IP cores. What’s changed? With regard to the Virage Logic acquisition, very little. Synopsys did acquire the ARC processor through that deal, but ARC had been much more focused ... » read more

Differentiating Embedded Processors

By Ed Sperling - 10 Dec, 2009 - Comments: 0

By Ann Steffora Mutschler The embedded processor world addresses a vast range of applications – from the datacenter to the biomedical device – all of which have critical power needs that vary with the use. Power concerns continue to dominate the embedded system whether it is avoid a noisy fan in a TV set-top box, allow video on a mobile phone or minimize pricey cooling costs in the datac... » read more

When It Comes To Intellectual Property, Size Matters

By Various Writers - 19 Aug, 2009 - Comments: 0

By Geoffrey James Intellectual property was once seen as the new growth market for EDA. Dozens of firms – large and small – jumped on the IP bandwagon, attracted to the “build once, sell many times” business model. “As late as 2004, the industry was still thinking that as much as 90% of SoCs would be reused IP,” said EDA consultant Gary Smith. The IP segment, however, hasn�... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

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Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

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The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

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Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

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tag: ARC

IP Subsystems Are Nothing New

ARM’s Race

Differentiating Embedded Processors

When It Comes To Intellectual Property, Size Matters