Tech Talk: Configurable Logic

By Ed Sperling - 08 Oct, 2015 - Comments: 0

Cliff Lloyd, business development director at NXP Semiconductors, talks about designing in one part for many functions to reduce power consumption and cost. [youtube vid=ut5kCm0kNwE] » read more

Reality Check: A Guide To Understanding Optimized Processor Cores

By Synopsys - 11 Mar, 2015 - Comments: 0

The performance of the processor core in an SoC is often a key product differentiator. It's not just about performance though - power and cost are equally important considerations. In today's markets, SoC developers have to hit aggressive power, performance and area goals to remain competitive. This white paper discusses the many interacting parameters that determine the optimum implementation ... » read more

Building An Efficient, Tightly-Coupled Embedded System Using An Extensible Processor

By Synopsys - 11 Jun, 2014 - Comments: 0

The increasing demand for better filtering and processing capabilities of the processor within embedded systems results in a trend to shift from 8-bit microcontroller tightly coupled embedded systems towards 32-bit processor bus-based embedded systems. As a consequence, the power, performance and area (PPA) ratio of these systems also shifts in favor of performance at the cost of power and area... » read more

Tech Talk: Power, Performance And Area In 2.5D

By Ed Sperling - 12 Feb, 2014 - Comments: 2

The cost will be comparable at first, but the only way to improve power, performance AND area at the same time will be with a different architectural approach. [youtube vid=XAbE7jpjuMA] » read more

Guesswork, And Other Design Paradigms

By Bernard Murphy - 14 Mar, 2013 - Comments: 0

PPA for soft IP seems like an oxymoron. How do you determine the implementation characteristics (PPA — Power, Performance and Area) for something that has not yet been implemented? Flying blind until implementation would be a rookie move. More likely you are going to estimate based on a prior implementation. Not a bad approach if the IP hasn’t changed significantly and the target library is... » read more

New Challenges, New Name

By Ed Sperling - 14 Jun, 2012 - Comments: 0

As you’ll notice today, we’ve changed our name from Low Power Engineering to Low-Power/High-Performance Engineering. We don’t take name changes lightly—we've been discussing this in depth with readers, sponsors, and researchers for the past six months. The almost universal conclusion is there is a big shift underway in the semiconductor industry today, and our new logo is a better refle... » read more

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Entities, people and technologies explored

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The critical, and growing, significance of mature node chips and processes.

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AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

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Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

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Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: area

Tech Talk: Configurable Logic

Reality Check: A Guide To Understanding Optimized Processor Cores

Building An Efficient, Tightly-Coupled Embedded System Using An Extensible Processor

Tech Talk: Power, Performance And Area In 2.5D

Guesswork, And Other Design Paradigms

New Challenges, New Name

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Entities, people and technologies explored