Tech Talk: Power, Performance And Area In 2.5D

A look at the economics and the design challenges of continuing down Moore’s Law, and why 2.5D is so attractive in the long term.


The cost will be comparable at first, but the only way to improve power, performance AND area at the same time will be with a different architectural approach.


[…] the standards-forming stage, with mature yield (cost) and EDA infrastructure this is looking like a key added weapon to the Moore’s Law […]

Dev Gupta says:

ultimately 2.5d w/ multiple dice must cost no more than a single SoC w/ diverse functional blocks, this means that the additional cost of the Si Interposer or even a fine pitch ( 2 um L / S ) organic substrate along with the cost of assembly must be paid for by splitting a single SoC into parts ( i,e. savings from not filling up a 20 or 28 nm Fab to make blocks that could have been made in a say 45 nm Fab, plus yield improvement by splitting a huge die into smaller dice as in the Xilinx modules — the only 2.5 d to date ), also the propagation delays & losses through the interposer must not be any worse than on a single large chip. till then all these Design related prognostications are premature & irrelevant.

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