tag: ARM

Blog Review: June 2
By Jesse Allen - 02 Jun, 2021 - Comments: 0

Synopsys' Mike Borza checks out how automotive ECUs, infotainment systems, and in-vehicle networks can be compromised by attackers and why it’s important to follow cybersecurity best practices and keep security in mind starting early in the design cycle. Cadence's Paul McLellan checks out the results from the latest MLPerf benchmarks for machine learning inference systems, with the new inc... » read more

Week In Review: Design, Low Power
By Jesse Allen - 28 May, 2021 - Comments: 0

Valens Semiconductor will become a publicly traded company on NYSE as VLN after a merger with PTK Acquisition Corp. Valens provides long-reach, high-speed video and data transmission for the audio-video and automotive industries. The transaction is expected to provide proceeds of approximately $240 million, including up to $115 million in trust from PTK Acquisition Corp. (assuming no redemption... » read more

Week In Review: Auto, Security, Pervasive Computing
By Susan Rambo - 28 May, 2021 - Comments: 0

Pervasive computing — IoT, edge, cloud, data center, and back Cadence announced it has found a cost-conscience way to scale capacity for 3D electromagnetic (EM) simulations using a hybrid cloud consisting of local computing resources and cloud services from Amazon Web Service (AWS). Data stays safe on the local resources, and, if more computing resources are needed, encrypted simulation-spec... » read more

Blog Review: May 26
By Jesse Allen - 26 May, 2021 - Comments: 0

Cadence's Paul McLellan checks out challenges in designing processors for AI applications, the explosion in the number of weights used to language processing, and the current state of training and inference hardware. Synopsys' Mike Gianfagna explores how hyper-convergent design will push device capabilities through integration of multiple technologies, multiple protocols, and multiple archit... » read more

Hardware-Software Co-verification (ARM CPU)
By Vtool - 26 May, 2021 - Comments: 0

In every complex SoC verification process, it is necessary to activate the CPUs during verification and to check the operation of the software they execute alongside the test’s scenarios. At a minimum, basic scenarios such as “boot rom execution” are tested, but in many cases, further scenarios are required. The CPUs themselves are usually proven IPs, but in order to verify their integrat... » read more

The Increasingly Uneven Race To 3nm/2nm
By Mark LaPedus and Ed Sperling - 24 May, 2021 - Comments: 2

Several chipmakers and fabless design houses are racing against each other to develop processes and chips at the next logic nodes in 3nm and 2nm, but putting these technologies into mass production is proving both expensive and difficult. It's also beginning to raise questions about just how quickly those new nodes will be needed and why. Migrating to the next nodes does boost performance an... » read more

Week In Review: Design, Low Power
By Jesse Allen - 21 May, 2021 - Comments: 0

Siemens will acquire Supplyframe, a supply chain intelligence, sourcing, and marketplace platform for the electronics industry, for $700 million. The company operates on a software-as-a-service model and will serve as the nucleus of Siemens’ digital marketplace strategy, according to Cedrik Neike, member of the Managing Board of Siemens AG. “Supplyframe’s ecosystem and marketplace intelli... » read more

Week In Review: Auto, Security, Pervasive Computing
By Susan Rambo - 21 May, 2021 - Comments: 0

Pervasive computing — IoT, edge, cloud, data center, and back Combining AI with IoT not only gives another acronym AIoT, or Artificial Intelligence of Things, but it puts AI systems on the edge. Infineon Technologies has released its ModusToolbox Machine Learning to make it possible to run deep learning-based workloads on Infineon’s PSoC microcontrollers. The toolbox has middleware, softwa... » read more

Advanced Packaging’s Next Wave
By Mark LaPedus - 20 May, 2021 - Comments: 0

Packaging houses are readying the next wave of advanced packages, enabling new system-level chip designs for a range of applications. These advanced packages involve a range of technologies, such as 2.5D/3D, chiplets, fan-out and system-in-package (SiP). Each of these, in turn, offers an array of options for assembling and integrating complex dies in an advanced package, providing chip custo... » read more

Blog Review: May 19
By Jesse Allen - 19 May, 2021 - Comments: 0

Cadence's Paul McLellan checks out a project from Intel and DARPA to combine the eASIC structured ASIC technology with data interface chiplets and enhanced security protection, with manufacturing in the U.S. In a podcast, Siemens EDA's Ellie Burns and Michael Fingeroff discuss the gap between what the best AI applications can perform today versus the human brain and the challenges that hardw... » read more

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