Week In Review: Design, Low Power

By Jesse Allen - 22 Oct, 2021 - Comments: 0

Tools Cadence's digital and custom/analog flows were certified for TSMC's N3 and N4 process technologies. Updates for the digital flow includes efficient processing of large libraries, additional accuracy during library cell characterization and static timing analysis, and support for accurate leakage calculation required in N3 and static power calculation for new N3 cells. Synopsys' digita... » read more

Week In Review: Design, Low Power

By Jesse Allen - 08 Oct, 2021 - Comments: 0

Arteris IP plans to become a public company. It filed a registration statement with the SEC for an IPO, and intends to list on Nasdaq. The number of shares to be offered and the price range for the proposed offering have not yet been determined. Arteris IP provides network-on-chip interconnect IP, cache coherent interconnects, and packages to speed functional safety certification alongside IP d... » read more

Week In Review: Auto, Security, Pervasive Computing

By Susan Rambo - 08 Oct, 2021 - Comments: 0

Automotive Qualcomm and SSW Partners, an investment partnership, now have a definitive agreement to acquire advanced driver assistance systems (ADAS) company Veoneer for $37.00 per share in an all-cash transaction that equals $4.5 billion in equity value. A few months ago, Qualcomm made the proposal to Veoneer after the company already had an agreement in place with Magma, a 60-year-old automo... » read more

More NoC Wisdom

By Kurt Shuler - 07 Oct, 2021 - Comments: 0

A common experience for anyone promoting a disruptive technology is that prospective customers understand that what is being offered is different. Still, without a familiar reference to compare, they extrapolate expectations unreliably. Sometimes expectations are extrapolated to infinity: “My existing solution has limitations, but the new technology should have no limitations.” Sometimes ex... » read more

Using Machine Learning For Characterizations Of NoC Components

By Arteris - 06 Oct, 2021 - Comments: 0

Modern NoC (Network-on-Chip) is built of complex functional blocks, such as packet switches and protocol converters. PPA (performance/power/area) estimates for these components are highly desirable during early design phases – long before NoC gate level netlist is synthesized. At this stage a NoC component is a soft module, described by a set of architectural parameters, like the bit width of... » read more

Week In Review: Design, Low Power

By Jesse Allen - 01 Oct, 2021 - Comments: 0

Valens Semiconductor began trading on the New York Stock Exchange as VLN after a merger with special-purpose acquisition company (SPAC) PTK Acquisition Corp. Valens offers high-speed connectivity chips for the audio-video and automotive markets, including its HDBaseT technology for connectivity between ultra-HD video sources and remote displays and its in-vehicle high-speed links. The transacti... » read more

Week In Review: Auto, Security, Pervasive Computing

By Susan Rambo - 01 Oct, 2021 - Comments: 0

Automotive GM’s self-driving car Cruise and Alphabet’s Waymo have won permits to offer rides to passengers in California. Ford Motor Company announced it is expanding its electric pickup truck assembly lines. With SK Innovation, Ford will create a 3,600-acre mega campus in west Tennessee to produce electric trucks. The company estimates the campus will add 6,000 new jobs to the economy.... » read more

NoC Experiences From The Trenches

By Kurt Shuler - 28 Sep, 2021 - Comments: 0

Network-on-chip (NoC) interconnect as an alternative to traditional crossbars is already well-proven, but there are still plenty of design teams on the cusp of a transition or who maybe do not yet see a need for a change. As with a switch to any new technology, the first hurdles are often simply misconceptions. When new users first evaluate any new technology, they often make the mistake of att... » read more

Software-Hardware Co-Design Becomes Real

By Brian Bailey - 27 Sep, 2021 - Comments: 1

For the past 20 years, the industry has sought to deploy hardware/software co-design concepts. While it is making progress, software/hardware co-design appears to have a much brighter future. In order to understand the distinction between the two approaches, it is important to define some of the basics. Hardware/software co-design is essentially a bottom-up process, where hardware is deve... » read more

Data Tsunami Pushes Boundaries Of IC Interconnects

By Ann Mutschler - 22 Sep, 2021 - Comments: 0

Rapid increases in machine-generated data are fueling demand for higher-performance multi-core computing, forcing design teams to rethink the movement of data on-chip, off-chip, and between chips in a package. In the past, this was largely handled by the on-chip interconnects, which often were a secondary consideration in the design. But with the rising volumes of data in markets ranging fro... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: Arteris IP

Week In Review: Design, Low Power

Week In Review: Design, Low Power

Week In Review: Auto, Security, Pervasive Computing

More NoC Wisdom

Using Machine Learning For Characterizations Of NoC Components

Week In Review: Design, Low Power

Week In Review: Auto, Security, Pervasive Computing

NoC Experiences From The Trenches

Software-Hardware Co-Design Becomes Real

Data Tsunami Pushes Boundaries Of IC Interconnects