The Week In Review: Design


M&A Intel will acquire Movidius, adding the company's low-power vision processing unit to its growing computer vision efforts that include a depth-sensing camera and machine learning projects. At the same time, Intel is shedding cybersecurity unit McAfee (acquired in 2011 for $7.7 billion and re-named Intel Security in 2014). Intel will retain a 49% stake in the business with the 51% rem... » read more

What’s Missing From Machine Learning


Machine learning is everywhere. It's being used to optimize complex chips, balance power and performance inside of data centers, program robots, and to keep expensive electronics updated and operating. What's less obvious, though, is there are no commercially available tools to validate, verify and debug these systems once machines evolve beyond the final specification. The expectation is th... » read more

All You Need Is Cache (Coherency) To Scale Next-Gen SoC Performance


Life on the SoC performance front remains a withering battle sometimes, because things can seem fairly bleak. As transistor scaling becomes more expensive below 10-nanometer feature sizes, every day it becomes harder to double performance every 18-months or so and stay competitive. Nowhere is the pain of this battle more acute than in consumer and automotive systems, where low cost is the key t... » read more

Easing Heterogeneous Cache Coherent SoC Design Using Arteris’ Ncore Interconnect IP


Heterogeneous processing has become a hallmark of mobile SoCs, but designing cache coherency across these diverse processing elements can be difficult. Standard on-chip interfaces and network-on-a-chip (NoC) technology are the first step, giving architects IP to efficiently connect compute processing elements as different as CPUs, GPUs, and DSPs. Hardware IP to enable coherent communication bet... » read more

New Architectures, Approaches To Speed Up Chips


The need for speed is back. An explosion in the amount of data that needs to be collected and processed is driving a new wave of change in hardware, software and overall system design. After years of emphasizing power reduction, performance has re-emerged as a top concern in a variety of applications such as smarter cars, wearable devices and cloud data centers. But how to get there has cha... » read more

Speeding Up The Design Process


A rush to plant a stake in new markets, coupled with uncertainty about how to generate a reasonable return on investment in those markets, is ratcheting up pressure on chipmakers. They now must come up with more customized solutions in less time, frequently in smaller volumes, and with the ability to modify them in shorter time spans if market opportunities shift in unexpected ways. This aff... » read more

How Cache Coherency Impacts Power, Performance


As discussed in part one, one of the reasons cache coherency is becoming more important is the shared common memory resource in designs today. Various agents in the design want to access the data the fastest they can, putting pressure on the CPU complex to manage all of the requests. Until a generation ago, it was okay for the CPU to control that memory and have access to it, as well as be t... » read more

How Cache Coherency Impacts Power, Performance


Managing how the processors in an SoC talk to one another is no small feat, because these chips often contain multiple processing units and caches. Bringing order to these communications is critical for improving performance and [getkc id="106" kc_name="reducing power"]. But it also requires a detailed understanding of how data moves, the interaction between hardware and software, and what c... » read more

Rethinking The Sensor


Sensor technology is beginning to change on a fundamental level as companies begin looking beyond a human’s five senses, on which early sensors were modeled, to what can be done with those sensors for specific applications. In some cases, [getkc id="187" kc_name="sensors"] don’t have to be as accurate as the sight, smell, touch, taste and hearing of a person. In others, they can be a... » read more

USDOT Smart City Challenge: Columbus Drives Future of Automotive Semiconductor Development


The Smart City Challenge will be an accelerant of automotive semiconductor innovation. The U.S. Department of Transportation has chosen Columbus as the winner of the Smart City Challenge, entitling Ohio’s capital city to $40 million U.S. government funding, along with $10M from Paul Allen’s Vulcan investment firm, and $90M that Columbus raised from private partners, to create a fully integr... » read more

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