The Week In Review: Design

HBM2 PHY; interconnect IP deals; EDA growth prediction; new ESD Alliance chairman.

popularity

IP

Rambus unveiled High Bandwidth Memory (HBM) Gen2 PHY developed for GlobalFoundries’ FX-14 ASIC platform. The PHY, targeted at networking and data center applications, is fully compliant with the JEDEC HBM2 standard and supports data rates up to 2000 Mbps per data pin, for a total bandwidth of 256 GB/s.

Omnitek launched a number of new FPGA-based video IPs, including HDMI2.0 Tx and Rx, V-By-One Tx, an image signal processor, and image stitch IP.

Deals

Nextchip licensed Arteris’ FlexNoC interconnect IP for use in image-based automotive ADAS systems, citing quality-of-service, simulation and integration features.

Nexell implemented Sonics’ SonicsGN NoC as the integration fabric in its recently introduced NXP5540 application processor, citing performance, configurability, and ease of integration. Nexell also used SonicsStudio as its SoC integration environment.

Flex Logix qualified several Serial I/O IP cores from CAST and SoC Solutions for use in its embedded FPGA.

eMemory’s NeoFuse NVM IP was qualified on TSMC’s 16nm FinFET Compact (16FFC) process. eMemory is also planning to develop NeoFuse technology in TSMC’s 12nm process.

Numbers

Market research firm Technavio expects EDA to grow at a CAGR of over 5% during 2017-2021, buoyed by increased adoption of EDA in the manufacturing of aerospace and defense equipment and cloud-based tools.

People

Sonics CEO Grant Pierce was elected chairman of the ESD Alliance Board of Directors. He will serve as chairman until the next board elections in 2018.

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