tag: Arteris

The Week In Review: Design/IoT
By Jesse Allen - 29 Apr, 2016 - Comments: 0

IP & Chips Synopsys debuted MIPI I3CSM controller IP, which incorporates in-band interrupts within the 2-wire interface to deliver low pin count. The IP supports all data rates up to 26.7 Mbps, dynamic address allocation, multi-master operations and 32-bit ARM AMBA Advanced Peripheral Bus slave interface. Marvell unveiled a family of Ethernet transceivers fully optimized for 2.5Gbps a... » read more

Way Too Much Data
By Ed Sperling - 28 Apr, 2016 - Comments: 0

Moving to the next process nodes will produce volumes more data, forcing chipmakers to adopt more expensive hardware to process and utilize that data, more end-to-end methodologies, as well as using tools and approaches that in the past were frequently considered optional. Moreover, where that data needs to be dealt with is changing as companies adopt a "shift left" approach to developing so... » read more

Bridging Hardware And Software
By Ann Mutschler - 28 Apr, 2016 - Comments: 1

The barriers between hardware and software design and verification are breaking down with more intricately integrated systems, bringing together different disciplines and tools. But there are lingering questions about exactly what this shift means design methodologies, team interactions, and what kind of training will be required in the future. Playing heavily into this is the fact that toda... » read more

The Week In Review: Design/IoT
By Jesse Allen - 22 Apr, 2016 - Comments: 0

Tools Rambus released the latest version of its platform for analysis of power and electromagnetic side-channel attacks, featuring upgrades to the workstation software and user interface for enhanced system performance and usability in ASIC and FPGA side-channel vulnerability testing. Deals Istuary Innovation Group licensed Arteris' FlexNoC interconnect IP for enterprise storage contro... » read more

The Week In Review: Design/IoT
By Jesse Allen - 01 Apr, 2016 - Comments: 0

Tools Synopsys unveiled a new custom design solution targeting FinFET layout, introducing visually-assisted routing automation, a built-in design rule checking engine, templates to apply previous layout decisions to new designs, and IC Compiler integration. TSMC certified the new tool for 10nm and 7nm FinFET process technologies. It has also been adopted by STMicroelectronics, GSI Technology... » read more

Planes, Cars, And Lagging Standards
By Ed Sperling - 28 Mar, 2016 - Comments: 0

Automotive and aerospace standards are struggling to adapt to pervasive connectivity, increased functionality, and new packaging approaches and architectures, leaving chipmakers and systems vendors unsure about what needs to be included in future designs. Each of these markets has a reputation for being lumbering and unresponsive, in part because they deal with safety-critical issues and i... » read more

Coherency, Cache And Configurability
By Ann Mutschler - 24 Mar, 2016 - Comments: 0

Coherency is gaining traction across a wide spectrum of applications as systems vendors begin leveraging heterogeneous computing to improve performance, minimize power, and simplify software development. Coherency is not a new concept, but making it easier to apply has always been a challenge. This is why it has largely been relegated to CPUs with identical processor cores. But the approach ... » read more

Why Is Semiconductor Schedule Predictability Boring?
By Kurt Shuler - 24 Mar, 2016 - Comments: 0

Why is it not sexy to talk about the manageability of system-on-chip (SoC) projects? As an IP vendor, we are constantly bombarded with questions about how our technology can enhance performance, reduce latency, and lower power consumption. At the same time, reducing cost and time to market for the SoC design conflict with these requirements, even though they rank right up there among the top en... » read more

Tech Talk: ADAS
By Ed Sperling - 23 Mar, 2016 - Comments: 0

Kurt Shuler, vice president of marketing at Arteris, explains what the Advanced Driver Assistance Systems standard is, where the problems are, and why this is becoming so important in automotive semiconductor design. » read more

How Many Cores? (Part 1)
By Ed Sperling - 10 Mar, 2016 - Comments: 2

The optimal number of processor cores in chip designs is becoming less obvious, in part due to new design and architectural options that make it harder to draw clear comparisons, and in part because just throwing more cores at a problem does not guarantee better performance. This is hardly a new problem, but it does have a sizable list of new permutations and variables—right-sized heteroge... » read more

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