Custom Versus Platform Design


The increase in [getkc id="81" kc_name="SoC"] complexity is being mirrored by a rise in complexity within the markets that drive demand for those chips. The upshot is that a push toward greater connectivity, lower power and better performance—and all for a minimal cost—has turned the pros and cons for custom design vs. platforms and superchips into a murky decision-making process. For t... » read more

Streamlining Interconnect Integration Accelerates Globally Distributed Design


As system on chip designs grow more complex, it becomes more and more difficult for chip companies to optimize the work of their distributed design teams. While each separate team has an area of expertise and sets their focus on a particular aspect of the SoC, the hard part comes in integrating these individual design efforts together. When something goes wrong and it doesn’t work, the compan... » read more

The Week In Review: Design/IoT


Deals Arteris teamed up with Yogitech to integrate the two companies' products. They're planning a set of ISO 26262 deliverables for a series of SoC reference designs and a functional safety assessment of the Arteris FlexNoC interconnect IP. ARM and Green Hills Software collaborated on an optimized compiler for the Cortex-R5 processor. The compiler achieved a score of 1.01EEMBC Automarks/... » read more

Challenges For IC Security


Keeping chips secure is really a foot race between the good guys and the bad guys. Going forward, expect heavily funded, grouped efforts to place tremendous pressure on security envelopes. This includes everything from simple home devices, such as routers, to the most critical infrastructures, such as power, telecom, transportation, and soon, the IoT. Fig. 1: Courtesy of Blade Genexis I... » read more

Back To The Future


The push to the next process node typically has meant that designs get simpler at existing and older nodes because the process technology is more mature and there have been so many chips developed at those nodes—many billions of them—that every possible corner case has been encountered hundreds, if not thousands, of times. That all makes sense in theory, but several key things have chang... » read more

First Look: 10nm


As the semiconductor industry begins grappling with mass production at 14/16nm process nodes, work is already underway at 10nm. Tools are qualified, IP is characterized, and the first test chips are being produced. It's still too early for production, of course—perhaps three years too early—but there is enough information being collected to draw at least some impressions about just how toug... » read more

Automotive System Design Challenges


The automotive semiconductor market did exceptionally well last year. IHS reported strong vehicle production growth and increased semiconductor content in 2014, and that trend is likely to continue with semiconductor revenue for the automotive segment to reach $31 billion this year, up from $29 billion last year. The market research company affirmed the fastest growing segments for automoti... » read more

Blog Review: Dec. 31


Mentor's J. VanDomelen zeroes in on the two most interesting discoveries from the Philae comet landing. So what was that "eerie cyclical clicking" sound? Synopsys' Ray Varghese digs into basic coherent transaction testing for AXI/ACE compliant interconnects. You might want to put on another pot of coffee. Cadence's Brian Fuller offers some deep insights into synthesis, verification and te... » read more

Trouble Spots And Optimism For 2015


Most top executives in the semiconductor industry are bullish about 2015 and even beyond, particularly as the [getkc id="76" comment="Internet of Things"] begins to drive new markets and market mash-ups, and as more semiconductors find their way into markets such as automotive, health-care and manufacturing. But it's not an entirely rosy picture, and top executives point to potential trouble sp... » read more

Is The Stacked Die Ecosystem Stagnating?


It is now widely agreed that not much has been happening in terms of adoption for 2.5D interposer and 3D ICs. “It seems like everyone is still at the starting line waiting for the race to begin," said Javier DeLaCruz, senior director of engineering of [getentity id="22242" e_name="eSilicon"]. "Interposer assembly and IP availability for effectively using the [getkc id="82" comment="2.5D IC... » read more

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