Power Benefits Of Modular Interconnect Design Using Network-On-Chip Technology

By Various Writers - 31 Jan, 2013 - Comments: 0

The system-on-chip (SoC) interconnect spans the entire floorplan of a chip and consumes a significant portion of the power. The interconnects of today’s SoCs are a distributed architecture of switches, buffers, firewalls, register slices, and clock and power domain crossings. One approach is to implement these units modularly with a simple, universal transport protocol between all units. This... » read more

Experts At The Table: SoC Verification

By Ed Sperling - 19 Dec, 2012 - Comments: 0

By Ed Sperling System-Level Design sat down to discuss the challenges of verification with Frank Schirrmeister, group director for product marketing of the System Development Suite at Cadence; Charles Janac, chairman and CEO of Arteris, Venkat Iyer, CTO of Uniquify; and Adnan Hamid, CEO of Breker Verification Systems. What follows are excerpts of that discussion. SLD: Is the amount of time... » read more

Executive Outlook

By Ed Sperling - 19 Dec, 2012 - Comments: 0

By Ed Sperling The view from the top of companies is a like a high-level of abstraction for viewing the industry. While engineers get caught up in individual projects, or pieces of projects, CEOs and CTOs tend to see things from a much broader perspective. So what do they see as the big issues and developments over the next 12 to 24 months? System-Level Design asked industry leaders that q... » read more

Looking Ahead

By Kurt Shuler - 19 Dec, 2012 - Comments: 0

By Kurt Shuler 2012 has been a tough year for the semiconductor industry and supplier industries like semiconductor intellectual property (IP), with a projected semiconductor sales decline of 3% below 2011’s results. But to those of us in the industry, the decline of 2012 was measured not in numbers, but in its effects on the people in our industry. 2012 brought significant change to the ... » read more

Automotive SoC Maker Uses NoC Technology

By Various Writers - 19 Dec, 2012 - Comments: 0

How the world's #1 vision-based Advanced Driver Assistance and Collision Avoidance Systems company uses Arteris FlexNoC interconnect IP to address demanding low-latency requirements in its automotive products. To download this white paper, click here. » read more

Experts At The Table: SoC Verification

By Ed Sperling - 14 Dec, 2012 - Comments: 0

Engineering Change Orders Revisited

By Ed Sperling - 29 Nov, 2012 - Comments: 0

By Ed Sperling The perennial nightmare of the marketing head reporting that a customer will buy a design—but only if it fits into a specific power envelope or has better performance or I/O—is all too familiar to engineering teams. In theory, using more third-party IP should help alleviate this problem because the IP can be changed out relatively easily. The reality, though, is that it�... » read more

Experts At The Table: SoC Verification

By Ed Sperling - 29 Nov, 2012 - Comments: 0

The Growing Verification Challenge

By Ed Sperling - 28 Nov, 2012 - Comments: 0

System-Level Design talks with Charles Janac of Arteris, Frank Schirrmeister of Cadence, Venkat Iyer of Uniquify and Adnan Hamid of Breker Verification Systems about the growing difficulty of verifying complex SoCs and what lies ahead. [youtube vid=zUB4_t9teE8] » read more

Quantum Shifts

By Ed Sperling - 25 Oct, 2012 - Comments: 0

By Ed Sperling Intel, STMicroelectronics and some of the leading memory providers already are working on 10nm process technology, and advanced researchers in universities and industry-leading companies are looking at 7nm, 5nm and even beyond. Those who have glimpsed this technological future have similar observations. There is no single technology problem that has to be solved at these node... » read more

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tag: Arteris

Power Benefits Of Modular Interconnect Design Using Network-On-Chip Technology

Experts At The Table: SoC Verification

Executive Outlook

Looking Ahead

Automotive SoC Maker Uses NoC Technology

Experts At The Table: SoC Verification

Engineering Change Orders Revisited

Experts At The Table: SoC Verification

The Growing Verification Challenge

Quantum Shifts