Capturing Timing Diagrams In Operational SVA

By OneSpin Solutions - 25 May, 2016 - Comments: 0

Timing diagrams provide an excellent, intuitive starting point for writing assertions to capture the intended behavior of designs. However, the standard assertion languages SVA and PSL do not provide direct constructs for capturing timing diagrams. This white paper presents Operational SVA – a simple yet powerful SVA library – which allows to develop assertions directly from timing diagrams... » read more

Bridging the IP Divide

By Brian Bailey - 18 May, 2016 - Comments: 1

IP reuse enabled greater efficiency in the creation of large, complex SoCs, but even after 20 years there are few tools to bridge the divide between the IP provider and the IP user. The problem is that there is an implicit fuzzy contract describing how the IP should be used, what capabilities it provides, and the extent of the verification that has been performed. IP vendors have been trying to... » read more

An Unsustainable Divide

By Brian Bailey - 24 Mar, 2016 - Comments: 0

One of the great things about attending DVCon, or any other conference for that matter, is the networking. You get to see so many people who are eager to learn, to talk and to share ideas. When this happens, you tend to hear a lot of statements that have to rattle around in your mind for a while before you can start to make sense of them and see if any coherent themes emerge. By themes, I am... » read more

EDA’s Clouded Future

By Brian Bailey - 25 Jun, 2015 - Comments: 0

There was a time, not that long ago, when chip design and EDA tools consumed some of the largest data centers with tens of thousands of machines and single datasets that consumed more than a hard disk could hold. The existing IT capabilities of the times were stretched to their limits. But while design sizes grew, other aspects of the flow did not develop as fast. “This has been driven by ... » read more

Power Verification Now Required

By Ann Mutschler - 17 Jun, 2015 - Comments: 0

Today’s verification tasks may seem daunting — and much of it is — but all of it is absolutely necessary to make sure chips operate properly with a larger system. Throw power into the mix and the challenges mount. The good news is that there is no shortage of tools and methodologies to help with these tasks. The bad news is that even the best tools won’t make the challenges disappear... » read more

Analog’s Day Of Reckoning

By Brian Bailey - 16 Jun, 2015 - Comments: 0

The numbers being touted by the semiconductor industry for IoT edge devices are staggering. How they are going to be used, who will make them, or indeed who will make money from them are much less certain. The industry seems to be clear about the content of these devices. A small processor, some flash memory or possibly even some of the new memory technologies that are coming along, a radio ... » read more

Full Coverage Or Full Monty

By Brian Bailey - 28 May, 2015 - Comments: 1

Without adequate coverage metrics and tools, verification engineers would never be able to answer the proverbial question: Are we done yet? But a lot has changed in the design flow since the existing set of metrics was defined. Does it still ensure that the right things get verified, that time is not wasted on things deemed unimportant or a duplication of effort, and can it handle today’s hie... » read more

Taming Lint With Formal

By Ravindra Aneja - 09 Apr, 2015 - Comments: 1

Designers have been using Linting tools for many years to ensure designs adhere to recommended coding guidelines. Linting tools verify that RTL is written in an unambiguous way to ensure that downstream tools (simulation, synthesis, etc.) do not interpret the code incorrectly, resulting in design, verification, timing or implementation issues. Linting tools take advantage of fast and shallow... » read more

Tech Talk: Better Coverage

By Ed Sperling - 08 Apr, 2015 - Comments: 1

Atrenta's Yuan Lu talks about code coverage, functional coverage and the use of assertions in debugging designs. [youtube vid=Hpm-l1z8HTo] » read more

Emulation Uses Increase

By Ed Sperling - 12 Feb, 2015 - Comments: 0

For more than two decades, [getkc id="30" comment="emulation"] was a technology in search of a market. While on paper it has always made sense to speed up simulation, using hardware acceleration was so pricey that few companies could justify the cost. Fast-forward to today and emulation is a major contributor to the bottom line at all of the Big Three [getkc id="7" kc_name="EDA"] companies. ... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: assertions