tag: ATE

Multi-die Testing In The Field Must Build On Established Test Methodologies
By Laura Peters - 07 Jul, 2026 - Comments: 0

Key Takeaways:  In-system testing is the very best way to ensure the longevity of data center and automotive hardware.  A 2-die monitor, test, and repair strategy requires a modified test strategy and new physical-aware bump repair.  Microbumps are too small to probe directly, so sacrificial pads enable probing.  The AI revolution is significantly outpacing the IC indust... » read more

When The Test Cell Lies
By Gregory Haley - 07 Jul, 2026 - Comments: 0

Key Takeaways:   A marginal test result can be electrically valid and still diagnostically misleading because the socket, load board, and thermal loop are now part of the measurement.   Separating device drift from test-cell drift depends on tracking margins, variance, and calibration trends rather than bins alone.   In advanced packages, a false pass destroys value downstream, ... » read more

Why Analog And Mixed-Signal Chips Resist Adaptive Test
By Gregory Haley - 09 Jun, 2026 - Comments: 0

Key Takeaways Analog and mixed-signal test remains heavily specification-based because the measurements do not always produce a single expected result. The absence of objective coverage metrics has historically encouraged conservative test flows, which IEEE 2427-2025 begins to address. Separating device behavior from test-path variation is a prerequisite for any adaptive flow—and h... » read more

Co-Packaged Optics Testing Faces Steep Data Center Ramp
By Anne Meixner - 09 Jun, 2026 - Comments: 0

Key Takeaways: Device interface board must balance flexibility in handling with customization for different optical connectors. Test fixtures should account for DUT socketing challenges, such as warpage, coupling, and interference. Advanced data management practices will help speed yield learning. Integrating photonic and electrical ICs into co-packaged optics (CPO) requires... » read more

Test Distribution Evolves To Meet AI Challenges
By Fabio Pizza - 12 May, 2026 - Comments: 0

The proliferation of artificial intelligence (AI) is driving rapid acceleration of the semiconductor market, which analysts now predict will reach $1 trillion this year. Many semiconductor devices will be the GPUs that populate the data centers that run AI workloads. Driven by strong, sustained investments from hyperscaler operators, high-performance computing (HPC)/AI data centers are expected... » read more

Smart Test Collides With The Data Chain
By Gregory Haley - 12 May, 2026 - Comments: 0

Key Takeaways: The promise of smart test is a data-chain problem before it is an algorithm problem. A device can pass every checkpoint and still carry a latent defect the test record never captured. As test grows more adaptive, the validity of the measurement environment matters as much as the measurement itself. For years, the test roadmap has pointed toward more adaptive f... » read more

From Reactive to Predictive: AI-Driven Optimization for ATE Performance & Reliability
By Cohu - 18 Mar, 2026 - Comments: 0

As ATE systems become increasingly complex and data-intensive, traditional rule-based optimization methods struggle to keep pace. In this Semicon Korea presentation, Cohu's Wai-Kong Chen will be exploring how artificial intelligence enables a paradigm shift from reactive troubleshooting to predictive and self-optimizing ATE systems. Read more here. Fig.1: Sweet spot inference.  Sourc... » read more

High-Throughput Image Sensors: Smart Testing Powers Progress
By Alexander Metzdorf - 13 Jan, 2026 - Comments: 0

In the race to produce higher resolution image sensors—now pushing beyond 500 megapixels—the industry faces significant challenges. These sensors aren’t just capturing more pixels; they’re handling massive streams of data, validating intricate on-chip AI functions, and doing it all at breakneck speeds. For manufacturers, the challenge is as unforgiving as it is critical: test more compl... » read more

Zero-Trust Data Sharing Architectures Redefining Chip Manufacturing
By Anne Meixner - 09 Dec, 2025 - Comments: 0

Real-time security clearances are becoming increasingly common in the manufacturing of advanced-node semiconductors, where data sharing is both essential and a potential security threat. Data security is a well-known issue in semiconductor manufacturing, but much of it is based on an outdated approach. In its place, zero-trust architectures [1] are now a requirement for new equipment and ins... » read more

Tackling Chip Complexity With Integrated System-Level Test Solutions
By Davette Berry - 09 Dec, 2025 - Comments: 0

As the sophistication of semiconductors continues to grow, so does the need for system-level test (SLT) in production to ensure that high-performance processors, chiplets, and other advanced devices function as expected in real-world environments. Once seen primarily as a fallback to catch what traditional automated test equipment (ATE) missed, SLT has now become a mission-critical step for val... » read more

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