tag: Atrenta

Bridging The IP Divide
By Brian Bailey - 14 Apr, 2016 - Comments: 0

The adoption of an IP-based model has enabled designs to keep filling the available chip area while allowing design time to shrink. But there is a divide between IP providers and IP users. It is an implicit fuzzy contract about how the IP should be used, what capabilities it provides, and the extent of the verification that has been performed. IP vendors have been trying to formalize this as mu... » read more

EDAC Changes Name
By Ed Sperling - 31 Mar, 2016 - Comments: 1

The EDA Consortium today changed its name to the Electronic System Design Alliance, a move that expands the group's charter to reflect shifts that have been underway in the chip design world for some time. Those shifts include the growth in IP and an increased focus on software development. Classic EDA, from place and route to synthesis to back-end debug and verification, are still very much... » read more

Defining Sufficient Coverage
By Brian Bailey - 28 Dec, 2015 - Comments: 0

Semiconductor engineering sat down to discuss the definition of sufficiency of coverage as a part of verification closure with Harry Foster, chief scientist at [getentity id="22017" e_name="Mentor Graphics"]; Willard Tu, director of embedded segment marketing for [getentity id="22186" comment="ARM"]; Larry Vivolo was, at the time of this roundtable, senior director of product marketing for [get... » read more

Defining Sufficient Coverage
By Brian Bailey - 07 Dec, 2015 - Comments: 0

Semiconductor engineering sat down to discuss the definition of sufficiency of coverage as a part of verification closure with Harry Foster, chief scientist at [getentity id="22017" e_name="Mentor Graphics"]; Willard Tu, director of embedded segment marketing for [getentity id="22186" comment="ARM"]; Larry Vivolo was, at the time of this roundtable, senior director of product marketing for [get... » read more

Defining Sufficient Coverage
By Brian Bailey - 24 Nov, 2015 - Comments: 2

Semiconductor Engineering sat down to discuss the definition of sufficient coverage as a part of verification closure with Harry Foster, chief scientist at [getentity id="22017" e_name="Mentor Graphics"], Willard Tu, director of embedded segment marketing for [getentity id="22186" comment="ARM"], Larry Vivolo (who at the time of this roundtable was senior director of product marketing for [gete... » read more

ARM Buys Carbon
By Brian Bailey - 20 Oct, 2015 - Comments: 3

ARM acquired Carbon Design Systems and its staff for an undisclosed amount of money, adding virtual prototyping capabilities for ARM cores. The deal is the latest in an onslaught of mergers and acquisitions that have racked the semiconductor industry over the past 18 months, propelled by low interest rates and relatively low valuations of target companies. For ARM, this deal solves a growing... » read more

The Week In Review: Design/IoT
By Jesse Allen - 09 Oct, 2015 - Comments: 0

Imec and Cadence completed the first tapeout of a 5nm test chip. Using a processor design, the companies taped out a set of designs using EUV lithography as well as Self-Aligned Quadruple Patterning for 193i lithography, where metal pitches were scaled from the nominal 32nm pitch down to 24nm to push the limit of patterning. Tools Synopsys folded in recent acquisition Atrenta's testabilit... » read more

How Much Security Is Enough?
By Ed Sperling - 17 Aug, 2015 - Comments: 0

Semiconductor Engineering sat down to discuss the current state of [getkc id="223" kc_name="security"] and what must be done in the future, with Denis Noël, head of cyber security solutions at [getentity id="22499" e_name="NXP"]; Serge Leef, vice president of new ventures at [getentity id="22017" e_name="Mentor Graphics"]; Andreas Kuehlman, senior vice president and general manager of the soft... » read more

Speeding Up Analog
By Ann Mutschler - 05 Aug, 2015 - Comments: 1

Semiconductor Engineering sat down to discuss analog design and how to speed up analog circuits with Kurt Shuler, vice president of marketing at Arteris; Bernard Murphy, CTO at Atrenta; Wilbur Luo, senior group director, product management for custom IC and PCB at Cadence; Brad Hoskins, director, IC design, microcontrollers at Freescale; and Jeff Miller, product manager at Tanner EDA. What foll... » read more

How Much Security Is Enough?
By Ed Sperling - 20 Jul, 2015 - Comments: 0

Semiconductor Engineering sat down to discuss the current state of [getkc id="223" kc_name="security"] and what must be done in the future, with Denis Noël, head of cyber security solutions at [getentity id="22499" e_name="NXP"]; Serge Leef, vice president of new ventures at [getentity id="22017" e_name="Mentor Graphics"]; Andreas Kuehlman, senior vice president and general manager of the soft... » read more

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