Analog Simulation At 7/5/3nm

Hany Elhak, group director of product management at Cadence, talks with Semiconductor Engineering about analog circuit simulation at advanced nodes, why process variation is an increasing problem, the impact of parasitics and finFET stacking, and what happens when gate-all-around FETs are added into the chip. » read more

Making Models Interoperable

As engineering teams raise the vision of their design to a higher level of abstraction, the use of behavioral modeling is growing. While not ubiquitous, the concepts are gelling, which at least is helping the industry discuss the technology more intelligently and determine where automation makes sense. One of the biggest concerns with behavioral modeling is what engineering teams want to do ... » read more

Filling In The Gaps For Mixed-Signal Verification

Semiconductor Engineering sat down to discuss mixed-signal [getkc id="10" kc_name="Verification"] with Haiko Morgenstern, Mixed-Signal Verification Group Staff Engineer at Infineon; Dr. Gernot Koch, CAD Manager at Micronas; Pierluigi Daglio, AMS Design Verification Flows Manager at STMicroelectronics; and Helene Thibieroz, AMS marketing manager at [getentity id="22035" comment="Synopsys"]. What... » read more

The Growing Need For Behavioral Modeling

By Ann Steffora Mutschler When it comes to behavioral or functional modeling, there is an inherent notion of function, architecture and interconnect. This approach has long been considered a future requirement, but in complex designs the future part no longer applies. Behavioral modeling is a way of isolating or abstracting out a key part of the architectural description and making sure i... » read more