tag: Bruker

3D Structures Challenge Wire Bond Inspection
By Karen Heyman - 09 May, 2023 - Comments: 1

Adding more layers in packages is making it difficult, and sometimes impossible, to inspect wire bonds that are deep within the different layers. Wire bonds may seem like old technology, but it remains the bonding approach of choice for a broad swath of applications. This is particularly evident in automotive, industrial, and many consumer applications, where the majority of chips are not de... » read more

Week In Review: Semiconductor Manufacturing, Test
By Gregory Haley - 21 Apr, 2023 - Comments: 0

GlobalFoundries filed suit in U.S. District Court in New York against IBM, accusing it of unlawfully disclosing IP and trade secrets to IBM partners, including Intel and Rapidus, potentially receiving hundreds of millions of dollars in licensing income and other benefits. The European Union released a €43 billion ($47 billion) plan for jumpstarting its semiconductor manufacturing industry,... » read more

What Data Center Chipmakers Can Learn From Automotive
By Anne Meixner - 11 Apr, 2023 - Comments: 2

Automotive OEMs are demanding their semiconductor suppliers achieve a nearly unmeasurable target of 10 defective parts per billion (DPPB). Whether this is realistic remains to be seen, but systems companies are looking to emulate that level of quality for their data center SoCs. Building to that quality level is more expensive up front, although ultimately it can save costs versus having to ... » read more

New Spintronics Manufacturing Process, Allowing Scaling Down To Sub-5nm (U. of Minnesota/NIST)
By Technical Paper Link - 20 Mar, 2023 - Comments: 0

A new technical paper titled "Sputtered L10-FePd and its Synthetic Antiferromagnet on Si/SiO2 Wafers for Scalable Spintronics" was published by researchers at University of Minnesota and NIST, with funding by DARPA and others. According to a University of Minnesota summary news article, "The industry standard spintronic material, cobalt iron boron, has reached a limit in its scalability. The... » read more

Metrology Strategies For 2nm Processes
By Laura Peters - 07 Mar, 2023 - Comments: 3

Metrology and wafer inspection processes are changing to keep up with evolving and new device applications. While fab floors still have plenty of OCD tools, ellipsometers, and CD-SEMs, new systems are taking on the increasingly 3D nature of structures and the new materials they incorporate. For instance, processes like hybrid bonding, 3D NAND flash devices, and nanosheet FETs are pushing the bo... » read more

Standards: The Next Step For Silicon Photonics
By Karen Heyman - 07 Mar, 2023 - Comments: 0

Testing silicon photonics is becoming more critical and more complicated as the technology is used in new applications ranging from medicine to cryptography, lidar, and quantum computing, but how to do that in a way that is both consistent and predictable is still unresolved. For the past three decades, photonics largely has been an enabler for high-speed communications, a lucrative market t... » read more

Week In Review: Semiconductor Manufacturing, Test
By Gregory Haley - 03 Mar, 2023 - Comments: 0

Semiconductor Research Corporation (SRC) released an interim roadmap for Microelectronic and Advanced Packaging Technologies (MPAT) that targets 10- to 15-year goals for 3D integration and multi-chiplet packaging. The roadmap is open for comments. Participants in the MPAT include AMD, IBM, Intel, Texas Instruments, Purdue University, SUNY Binghamton and the Georgia Institute of Technology. It i... » read more

Mechanical Characterization Of Ultra Low-k Dielectric Films
By Bruker - 08 Feb, 2023 - Comments: 0

Dielectric materials are of critical importance in the function of microelectronic devices because they electrically isolate conductive components from one another in microcircuits. Capacitance between conductors can limit a circuit’s maximum operating frequency, and the capacitance increases in inverse proportion to the separation distance between the conductors. Therefore, to minimize the s... » read more

Week In Review: Semiconductor Manufacturing, Test
By Karen Heyman - 03 Feb, 2023 - Comments: 0

Imec released its semiconductor roadmap, which calls for doubling compute power every six months to handle the data explosion and new data-intensive problems. Imec named five walls (scaling, memory, power, sustainability, cost) that need to be dismantled. The roadmap (below) stretches from 7nm to 0.2nm (2 angstroms) by 2036, and includes four generations of gate-all-around FETs followed by thre... » read more

Metrology Options Increase As Device Needs Shift
By Laura Peters - 10 Jan, 2023 - Comments: 1

Semiconductor fabs are taking an ‘all hands on deck’ approach to solving tough metrology and yield management challenges, combining tools, processes, and other technologies as the chip industry transitions to nanosheet transistors on the front end and heterogenous integration on the back end. Optical and e-beam tools are being extended, while X-ray inspection is being added on a case-by-... » read more

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