Chip Industry Week In Review

By The SE Staff - 10 Jul, 2026 - Comments: 0

Micron The memory maker rolled out a slew of announcements this week, including: Raised its planned U.S. investment to more than $250B through 2035, an incremental $50B above what was announced last June, with an ultimate goal of producing 40% of its DRAM in the U.S.; Planned new investments of $3B for U.S. IC supply-chain investments, including $500M in financing for GlobalWafers’ 3... » read more

AI Is Rewriting The IP Playbook

By Ann Mutschler - 09 Jul, 2026 - Comments: 0

Key Takeaways: AI is reshaping the entire IP lifecycle, from creation and verification to discovery, licensing, and support. Fast-changing AI models are making flexible IP, robust toolchains, and faster deployment essential. Human expertise remains critical for reviewing, validating, and governing AI-assisted IP development. AI is becoming part of the everyday work o... » read more

UALink Under The Hood: Why Full-Stack Verification Wins

By Sandeep Grover - 09 Jul, 2026 - Comments: 0

It is tempting to picture UALink as a clean line between two accelerators: requests enter one side, responses emerge from the other. The abstraction is useful — but it conceals almost everything that makes the protocol interesting, and almost everything that makes it difficult to verify. Verifying UALink means following a transaction the way the silicon does: down through four layers, out ... » read more

An AI Model Fit For Purpose

By Brian Bailey - 09 Jul, 2026 - Comments: 0

Key takeaways A model can only be used for its intended purpose, in a defined context, without taking unknown risks. Models must be created using a well-defined process and verified in a way that provides a level of independence. Deployment requires trust and a way to track the properties of the model. A model captures some kind of behavior exhibited in the real world, b... » read more

Field Guide to DDR Signal Integrity Analysis

By Cadence - 08 Jul, 2026 - Comments: 0

A working field guide to the JEDEC measurements that decide DDR signoff: eye width and height, overshoot and ringback, DQ-to-DQS skew, RX mask margins, and the BER reports behind them. See how Sigrity X PowerSI and Sigrity SystemSI verify each one against JEDEC values inside your Allegro design flow. What's Inside: Know exactly what to measure: The full JEDEC checklist for DDR4, DDR5, ... » read more

Blog Review: July 8

By Jesse Allen - 08 Jul, 2026 - Comments: 0

Synopsys' Greg Sorber finds that an explosion in product complexity has made it increasingly difficult to isolate decisions or defer validation until late in the development process, fundamentally changing how systems ranging from cars to consumer electronics are designed. Cadence's Harinee Rathod shows how MACsec helps ensure data confidentiality, integrity, and authenticity directly at the... » read more

AI Data Centers And Auto Industry Converge On Same Issues

By Liz Allan - 02 Jul, 2026 - Comments: 0

Key Takeaways: AI data centers need power from a range of sources, including batteries, to safeguard against blackouts, transient voltage spikes, and grid demand spikes. As with regenerative braking and bidirectional charging in electric vehicles, data centers could feed power or heat back into the grid for public use, but the immediate goal is to disrupt the grid as little as pos... » read more

Defending Against AI-Enabled Data Fusion

By Ann Mutschler - 02 Jul, 2026 - Comments: 0

Key Takeaways: By fusing vast amounts of white-, gray-, and black-market data, attackers can build a digital twin of a person and their environment, making targeted attacks far easier. The intersection of AI and cybersecurity is the data itself. Trustworthy fusion depends on authenticated, integrity‑checked inputs and verifiable, attributable AI outputs. Defending a... » read more

NVMe 2.0 Explained: What’s New And Why It Matters

By Vishal Patel - 02 Jul, 2026 - Comments: 0

Non-Volatile Memory Express (NVMe) has become the dominant protocol for high-performance storage across client SSDs, enterprise drives, and hyperscale data centers. With NVMe 2.0, the specification expands beyond traditional block-based SSD access with new command sets, broader media support, improved transport organization, and enhancements for modern deployments. This post explores what is n... » read more

Fine-Tuning Humanoid Vision And Movement