Formal Verification’s Usefulness Widens

By Ann Mutschler - 31 Jan, 2024 - Comments: 0

Formal verification is being deployed more often and in more places in chip designs as the number of possible interactions grows, and as those chips are used in more critical applications. In the past, much of formal verification was focused on whether a chip would function properly. But as designs become more complex and heterogeneous, and as use cases change, formal verification is being u... » read more

Blog Review: Jan. 31

By Jesse Allen - 31 Jan, 2024 - Comments: 0

Synopsys' William Ruby argues for a comprehensive energy-efficient design methodology for automotive ICs as today's vehicles demand ever more computing power to support electrification, communication, and processing of massive amounts of data. Cadence's Mellacheruvu Srikanth finds that verifying all the new features and enhancements across several generations of PCIe while maintaining backwa... » read more

FMEDA-Driven SoC Design Of Safety-Critical Semiconductors

By Cadence - 31 Jan, 2024 - Comments: 0

As state-of-the-art electronics propel the automotive, industrial, and aerospace industry into a future of more connectivity and autonomy, the development of safety-compliant semiconductors is critical. The Cadence FMEDA-driven Safety Solution consists of products enhanced for advanced safety analysis, safety verification, and safety-aware implementation for digital driving analog and dig... » read more

Why There Are Still No Commercial 3D-ICs

By Brian Bailey - 29 Jan, 2024 - Comments: 0

Building chips in three dimensions is drawing increased attention and investment, but so far there have been no announcements about commercial 3D-IC chips. There are some fundamental problems that must be overcome and new tools that need to be developed. In contrast, the semiconductor industry is becoming fairly comfortable with 2.5D integration, where individual dies are assembled on some k... » read more

Chip Industry Week In Review

By The SE Staff - 26 Jan, 2024 - Comments: 0

By Jesse Allen, Karen Heyman, and Susan Rambo UMC and Intel will collaborate on the development of a 12nm semiconductor process platform to address high-growth markets, such as mobile, communications infrastructure, and networking. Apple reportedly pushed back the launch date of its long-awaited electric vehicle and scaled back the self-driving features to L2 driver assistance, according ... » read more

IC Tool Vendors Eye Cloud-Native Future

By Aharon Etengoff - 25 Jan, 2024 - Comments: 0

The promise of scalability and efficiency is accelerating the migration of electronic design automation (EDA) to the cloud. Unlimited on-demand compute resources fundamentally change the chip design paradigm, where tools and workloads are no longer constrained by localized hardware. This is easier said than done, however. Optimizing existing tools and infrastructure, creating a new generatio... » read more

Can Data Centers Afford To Turn Up The Heat?

By Mark Seymour - 25 Jan, 2024 - Comments: 0

Typically, when we discuss digital twin software for data centers, we highlight how engineers can use data center software to model complex thermals using physics-based simulation and find effective ways to cool IT equipment. However, there are compelling efficiency and cost-saving reasons for data center operators to actively seek to run their data centers hotter. But how can this be done wit... » read more

Blog Review: Jan. 24

By Jesse Allen - 24 Jan, 2024 - Comments: 0

Siemens' John McMillan finds that while 3D-IC capabilities are ready for mainstream, mass adoption success depends on how easily, effectively, and efficiently a solution can be delivered and points to five workflow adoption focus areas. Cadence's Andre Baguenie shows how to easily convert a logic signal to an electrical value using Verilog-AMS and the transition filter. Synopsys' Chris Cl... » read more

Rethinking Memory

By Karen Heyman - 22 Jan, 2024 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to talk about the path forward for memory in increasingly heterogeneous systems, with Frank Ferro, group director, product management at Cadence; Steven Woo, fellow and distinguished inventor at Rambus; Jongsin Yun, memory technologist at Siemens EDA; Randy White, memory solutions program manager at Keysight; and Frank Schirrmeister, vice... » read more

Chip Industry Week In Review

By The SE Staff - 19 Jan, 2024 - Comments: 0

By Jesse Allen, Gregory Haley, and Liz Allan Synopsys will acquire Ansys for about $35 billion in cash and stock. The deal will boost Synopsys' multi-physics simulation capabilities, which are essential for complex 3D-IC designs, where thermal density can have significant repercussions. The acquisition is expected to be finalized in the first half of 2025. Worldwide semiconductor revenue ... » read more

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Knowledge Centers
Entities, people and technologies explored

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

Legacy Process Nodes Going Strong

The critical, and growing, significance of mature node chips and processes.

by Bryon Moyer

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: Cadence

Formal Verification’s Usefulness Widens

Blog Review: Jan. 31

FMEDA-Driven SoC Design Of Safety-Critical Semiconductors

Why There Are Still No Commercial 3D-ICs

Chip Industry Week In Review

IC Tool Vendors Eye Cloud-Native Future

Can Data Centers Afford To Turn Up The Heat?

Blog Review: Jan. 24

Rethinking Memory

Chip Industry Week In Review

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Entities, people and technologies explored