tag: Cadence

Flex PCBs Explained: From Materials to Applications Technical eBook
By Cadence - 30 Apr, 2025 - Comments: 0

This ebook provides a comprehensive overview of flex PCBs, highlighting their unique benefits, materials used, common challenges, and how you can overcome them. Learn about the various applications of rigid-flex/flex PCBs in modern electronics and gain insights into the future of flex design. Read more here. Fig.1: Small Flex PCB.  Source: Cadence. » read more

Chip Industry Week in Review
By The SE Staff - 25 Apr, 2025 - Comments: 0

To listen to the podcast version, click here. TSMC unveiled an unusually detailed roadmap at this week's North America Technology Symposium, including future architectures for 3D-ICs for high-performance computing and small, extremely low-power chips for AR/VR glasses, and two implementations of system-on-wafer. Fig. 1: TSMC's future packaging and stacking roadmap. Source: TSMC The ... » read more

AI Drives Re-Engineering Of Nearly Everything In Chips
By Ed Sperling - 24 Apr, 2025 - Comments: 0

AI's ability to mine patterns across massive quantities of data is causing fundamental changes in how chips are used, how they are designed, and how they are packaged and built. These shifts are especially apparent in high-performance AI architectures being used inside of large data centers, where chiplets are being deployed to process, move, and store massive amounts of data. But they also ... » read more

NOP Flit Payload: A Dedicated Debug Channel
By Geeta Arora - 24 Apr, 2025 - Comments: 0

Modern PCIe systems are complex, with high-speed data transfer and intricate protocols. Traditional debug methods often struggle to provide the necessary granularity and real-time visibility into link behavior. Transient issues, timing-sensitive errors, and protocol interactions can be difficult to pinpoint with conventional methodology. NOP Flit addresses this challenge. PCIe Gen 6 introduc... » read more

Analog Creates Ripples in Digital Verification
By Brian Bailey - 24 Apr, 2025 - Comments: 0

We live in an analog world, but analog has been minimized whenever possible. At some point digital and analog must come together in every electronic device, and that has long been an area where errors creep in. The Wilson Research Group and Siemens EDA functional verification study has long shown that analog and mixed signal are two of the highest causes of flaws that result in chip respins.... » read more

Accelerating SI/PI Signoff: A Shift-Left Approach to PCB Design
By Cadence - 23 Apr, 2025 - Comments: 0

In high-speed PCB design, late-stage signal integrity (SI) and power integrity (PI) issues can lead to costly redesigns and delays. This white paper explores how in-design analysis helps engineers catch and fix SI/PI challenges early, saving time, reducing risks, and ensuring first-pass success. What You’ll Learn: The Shift-Left Advantage – How early SI/PI analysis minimizes late-s... » read more

Chip Industry Week In Review
By The SE Staff - 18 Apr, 2025 - Comments: 0

[Podcast version is here.] TSMC said it will produce 30% of its leading-edge chips in Arizona when all six of its fabs are operational, a total investment of $165 billion, Axios reported. In its latest SEC filing, the foundry said it continues to add capacity in Taiwan, Arizona, Japan, and Germany. The Trump administration launched a Section 232 investigation into semiconductors and relat... » read more

Can Chiplets Serve Cost-Conscious Apps?
By Bryon Moyer - 17 Apr, 2025 - Comments: 0

Chiplets are emerging as a significant new phase in the evolution of the semiconductor market, providing a way to continue scaling performance well beyond the size limitations of a reticle. But that improvement comes with a high price tag and a lot more complexity, which so far has limited adoption. One of the main reasons for the cost increase is the need for advanced packaging when employi... » read more

Blog Review: Apr. 16
By Jesse Allen - 16 Apr, 2025 - Comments: 0

Siemens’ Tova Levy finds that heterogeneous integration necessitates a shift to a system-level technology co-optimization approach where power, performance, area, cost, and reliability are considered across various components, including silicon, package, interposer, and PCB. Synopsys’ Greg Sorber listens in as Arm’s Rene Haas and Synopsys’ Sassine Ghazi discuss the opportunity for AI... » read more

AI Agents Need Goals
By Brian Bailey - 16 Apr, 2025 - Comments: 0

Experts At The Table: Definitions and goals matter when it comes to using AI effectively, and it has to be tightly reined in to be effective. Semiconductor Engineering sat down with a panel of experts to discuss these issues and others, including Johannes Stahl, senior director of product line management for the Systems Design Group at Synopsys; Michael Young, director of product marketing for ... » read more

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