tag: Calypto

Who Pays For EDA Shift Left?
By Brian Bailey - 12 Feb, 2015 - Comments: 0

While working on the predictions articles for 2015 (markets, design, semiconductors, tools and flows), a number of companies talked about the great shift left that is happening in the industry. What was surprising was the number of companies that mentioned it, and in very different ways. It is clear that shift left does not mean the same thing to all people. While they all see it addressing ... » read more

With Responsibility Comes Power
By Brian Bailey - 12 Feb, 2015 - Comments: 0

The debate continues as to whether [getkc id="106" kc_name="power"] has risen to become a primary design consideration, or if it remains secondary to functionality and performance. What is indisputable is the rise in the importance of both power and energy conservation. As technology improves, additional aspects of the design flow are being affected. With that, the focus for power reduction is ... » read more

Power Management Verification Requires Holistic Approach
By Ann Mutschler - 12 Feb, 2015 - Comments: 0

Semiconductor Engineering sat down to discuss power management [getkc id="10" kc_name="Verification"] issues with Arvind Shanmugavel, senior director, applications engineering at [getentity id="22021" e_name="Ansys-Apache"]; Guillaume Boillet, technical marketing manager at [getentity id="22026" e_name="Atrenta"]; Adam Sherer, verification product management director at [getentity id="22032" e_... » read more

Blog Review: Jan. 21
By Ed Sperling - 21 Jan, 2015 - Comments: 0

Mentor's John Day attended the IBM talk at last week's Automotive News World Congress in Detroit. The upshot: The automotive industry is ripe for disruptive changes, but autonomous vehicles aren't likely to be part of those changes. Cadence's Axel Scherer spins a tale of movie and electronic magic, with a little debug technology thrown in—and notes how quickly things that seemed magical a... » read more

Higher Frequencies Mean More Memory
By Ann Mutschler - 16 Jan, 2015 - Comments: 0

As SoCs get more complex, whether due to higher frequencies or adding more functionality, there is a spillover effect on bandwidth, [getkc id="22" kc_name="memory"] and power. There is no simple way to just turn up the clock frequency in a complex [getkc id="81" kc_name="SoC"]. That relatively straightforward objective will likely require more power domains, more cores, more ways to move sig... » read more

Unraveling Power Methodologies
By Brian Bailey - 15 Jan, 2015 - Comments: 0

When working on articles, the editors at Semiconductor Engineering sometimes hear things that make them stand back and question what seems to be an industry truth. One such statement happened last month while researching a different article. The statement was: Most designs are not top-down, but in fact bottom-up when it comes to power management. The most used methodology today is that the RTL... » read more

(Low) Power Predictions 2015
By Anand Iyer - 15 Jan, 2015 - Comments: 1

Happy New Year! As we step into the New Year, lots of exciting things are already underway. First of all, the Internet of Things (IoT) is shaping up in a big way as witnessed at CES last week. Advances in devices that can talk to each other and share information are becoming a reality. Automotive applications, medical devices, industry automation, energy distribution and entertainment are all a... » read more

New Challenges For Wearables
By Ed Sperling - 15 Jan, 2015 - Comments: 0

It was Dick Tracy’s wristwatch communicator that triggered the public’s appetite for wearable electronics. Introduced in a 1946 syndicated comic strip, the idea was so compelling that it inspired the release of hundreds of wrist-based devices ranging from walkie-talkies to calculators to GPS trackers, heartbeat and movement monitors. Yet despite the public’s fascination with this kind of ... » read more

A Survey Of Our Low Power Blogs In 2014
By Rob Eccles - 12 Dec, 2014 - Comments: 0

Over the past year, we have written a number of blogs on low power IC design. Here at the end of 2014 approaches, let’s look back at what we have discussed Our blogs covered methods to estimate and reduce power consumption in digital ICs. Our recommendation is that you do this early in the design cycle, such as the RTL coding stage, when you can have the most positive impact. In the first... » read more

The Week In Review: Design/IoT
By Ed Sperling - 05 Dec, 2014 - Comments: 0

Tools Calypto rolled out its third-generation high-level synthesis platform after three years of development, adding granular control over which regions are optimized and the ability to work top-down and bottom-up—basically allowing designers to zoom in and out as needed. In addition, the tool has a 10X increase in capacity and supports SystemC and C++. eSilicon unveiled its online conf... » read more

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