(Low) Power Predictions 2015

Low power is about to go mainstream for design teams as the need for building efficiency into designs continues to grow.


Happy New Year! As we step into the New Year, lots of exciting things are already underway. First of all, the Internet of Things (IoT) is shaping up in a big way as witnessed at CES last week. Advances in devices that can talk to each other and share information are becoming a reality. Automotive applications, medical devices, industry automation, energy distribution and entertainment are all affected by the growth of IoT. Power is an essential design consideration for IoT. Indeed, 2015 is turning out to be an important year for power efficiency and low power methodologies.

Here are some ways that low power IC design will change in 2015:

  1. Power efficiency is no longer an “additional” design consideration. Rather, it needs to be built into the design. Performance has been the focus of designers for a long time. When power became important, designers used it as a secondary design constraint. They added power techniques to their existing designs and lowered power consumption as much as possible. But with power being the driver of chip design, designers no longer have the luxury of adding low power techniques after they have designed their chips. Power efficiency must be built into the design.
  2. Designers wrest the ownership of power efficiency. Companies relied on power experts in the past. As low power techniques became popular, design teams relied on power experts to build low power into their designs. This was not a smooth process. It involved passing the design back and forth until the power budget was met. This process should be reviewed with the advent of so many devices being designed. These designs have very tight market pressures and hence design teams can no longer afford to wait for power experts to design in low power. They have to own building power efficiency into their designs.
  3. The number of 14nm and 16nm finFET designs is increasing. Several articles have pointed out that the cost per transistor increases or stays the same in FinFET technologies. Despite this fact, many more designs are moving to these technologies in 2015. This is simply because the stakes are much higher in the new markets, so the choice to move is a question of survival. Designers will use other methods such as finding efficient architectures to mitigate the cost increase.
  4. Low power everything design flows. Designs moving to finFET technologies have to tackle dynamic power increases in addition to the leakage issues that were dealt with in other process technologies. As a result, designers are experimenting with every low power technique available to choose the most suitable techniques.
  5. Low power tools and methodologies become intuitive to the designers. Techniques like power gating or dynamic voltage and frequency scaling (DVFS) have always intimidated RTL designers with the variety of tools and methodologies they need to use. If more and more RTL designers are building low power into their designs, the methodologies will need to be made simpler for them to adopt. The need for intuitive power exploration, power analysis, and power optimization tools is immediate.

We have made some bold predictions for 2015 based on the changes we see in the marketplace, and at the end of the year we’ll reevaluate our predictions to see how many have really come true. Look for more technical discussions on power analysis in February.


Nandini Jayakumar says:

RTL is going to have a replacement of its own very soon. Work is done in many process technologies as of now, let’s see, which one goes far enough.

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