tag: DVFS

Managing Power Dynamically
By Ann Steffora Mutschler - 18 Dec, 2019 - Comments: 1

Design teams are beginning to consider dynamic power management techniques as a way of pushing the limits on performance and low power, leveraging approaches that were sidelined in the past because they were considered too difficult to deploy. Dynamic voltage and frequency scaling (DVFS), in particular, has resurfaced as a useful approach. Originally intended to dynamically balance performan... » read more

Power Complexity On The Rise
By Ann Steffora Mutschler - 14 Nov, 2019 - Comments: 0

New chip architectures and custom applications are adding significant challenges to chip design and verification, and the problems are becoming much more complex as low power is added into the mix. Power always has been a consideration in design, but in the past it typically involved different power domains that were either on, off, or in some level of sleep mode. As hardware architectures s... » read more

Focus Shifts To Wasted Power
By Brian Bailey - 10 Oct, 2019 - Comments: 0

Mobile phones made the industry aware of power, but now the focus is shifting to the total energy needed to perform a task. Activity that is unnecessary to perform the intended task is wasted power, and reducing it requires some new methodologies and structural changes within development teams. There is a broadening awareness about power. "The companies doing SoCs for mobile lead the charge ... » read more

Power Issues Rising For New Applications
By Ann Steffora Mutschler - 21 Jan, 2019 - Comments: 0

Managing power in chips is becoming more difficult across a wide range of applications and process nodes, forcing chipmakers and systems companies to rethink their power strategies and address problems much earlier than in the past. While power has long been a major focus in the mobile space, power-related issues now are spreading well beyond phones and laptop computers. There are several re... » read more

Explaining Adaptive Voltage Scaling And Dynamic Voltage Frequency Scaling
By Ramsay Allen - 17 Jul, 2018 - Comments: 0

A Q&A with Moortec CTO Oliver King. What exactly do we mean by Adaptive Voltage Scaling versus Dynamic Voltage Frequency Scaling? Adaptive Voltage Scaling (AVS) involves the reduction of power by changing the operating conditions within an ASIC in a closed loop. Dynamic Voltage Frequency Scaling (DVFS), on the other hand, is a power management technique where the voltage is increased ... » read more

System-Level Power Modeling Takes Root
By Ann Steffora Mutschler - 10 May, 2018 - Comments: 0

Power, heat, and their combined effects on aging and reliability, are becoming increasingly critical variables in the design of chips that will be used across a variety of new and existing markets. As more processing moves to edge, where sensors are generating a tsunami of data, there are a number of factors that need to be considered in designs. On one side, power budgets need to reflect th... » read more

What Happened To UPF?
By Brian Bailey - 16 Apr, 2018 - Comments: 1

Two years ago there was a lot of excitement, both within the industry and the standards communities, about rapid advancements that were being made around low-power design, languages and methodologies. Since then, everything has gone quiet. What happened? At the time, it was reported that the [gettech id="31043" comment="IEEE 1801"] committee was the largest active committee within the IEEE. ... » read more

Thermal Issues And Modern SoCs: How Hot Is Hot?
By Ramsay Allen - 16 Mar, 2018 - Comments: 0

A Q&A with Moortec CTO Oliver King. What are the thermal issues of modern SoCs? Gate density has been increasing with each node and that pushes up power per unit area, and I think that has become an even bigger issue with FinFET processes where the channels are more thermally isolated than the planar processes before them. In the last few planar nodes, leakage was an issue which led ... » read more

IP And Power
By Brian Bailey - 08 Mar, 2018 - Comments: 0

[getkc id="108" kc_name="Power"] is quickly becoming a major differentiator for products, regardless of whether they are connected to a wall outlet or dependent on a battery. At the same time, increasing amounts of a chips content comes from third-party [getkc id="43" kc_name="IP"]. So how do system designers ensure that the complete system has an optimal power profile, and what can they do to ... » read more

New Thermal Issues Emerge
By Ann Steffora Mutschler - 12 Feb, 2018 - Comments: 0

Thermal monitoring is becoming more critical as gate density continues to increase at each new node and as chips are developed for safety critical markets such as automotive. This may sound counterintuitive because the whole point of device scaling is to increase gate density. But at 10/7 and 7/5nm, static current leakage is becoming a bigger issue, raising questions about how long [getkc id... » read more

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