tag: DVFS

Robust Dynamic Voltage Droop Mitigation And Power Management
By Graham Woods - 13 Jan, 2026 - Comments: 1

Power management is one of the keys for developing successful semiconductors products. There are virtually no applications for which power consumption is not a concern. Many creative solutions have been developed to reduce and manage power. Making these schemes work robustly in real-world conditions can be a challenge. This post considers widely used methods—voltage droop/glitch detection and... » read more

Thermal Sensing Headache Finally Over For 2nm And Beyond
By Nir Sever - 11 Nov, 2025 - Comments: 0

Effective thermal management is crucial to prevent overheating and optimize performance in modern SoCs. Inadequate temperature control due to inaccurate thermal sensing compromises power management, reliability, processing speed, and lifespan, leading to issues like electromigration, hot carrier injection, and even thermal runaway. Unfortunately, precise thermal monitoring reached an inflect... » read more

Critical Optimization Factors For GenAI Chipmakers
By Alex Burlak - 14 Oct, 2025 - Comments: 0

Today’s GenAI arms race is fought with novel chip architectures and packaging. Specialized hardware designs are proliferating in the form of GPUs, TPUs, NPUs, and more, all tuned for parallelism and matrix-heavy AI math. In this hyper-competitive landscape, chip vendors scramble to differentiate their products on multiple fronts. They promise some mix of better performance, efficiency, or ... » read more

Heterogeneous Multi-Core Architecture Optimizing Power Consumption (TU Dresden)
By Technical Paper Link - 04 Sep, 2025 - Comments: 0

A new technical paper titled "Balancing Power and Performance With Task Dependencies in Multi-Core Systems" was published by researchers at TU Dresden. Abstract "The increasing use of FPGAs necessitates energy-efficient solutions, particularly for battery-powered applications. Although power dissipation is often perceived as a hardware issue, it can be mitigated through power-saving techniq... » read more

Data-Driven Approach To Power Modeling For DVFS-Enabled Heterogeneous Systems (ETH Zurich et al.)
By Technical Paper Link - 01 Jul, 2025 - Comments: 0

A technical paper titled "Data-driven power modeling and monitoring via hardware performance counter tracking" was published by researchers at ETH Zürich, Scuola Superiore Sant’Anna, RISE Research Institutes of Sweden and University of Bologna. Abstract "Energy-centric design is paramount in the current embedded computing era: use cases require increasingly high performance at an afforda... » read more

Offline RL Framework That Dynamically Controls The GPU Clock And Server Fan Speed To Optimize Power Consumption And Computation Time (KAIST)
By Technical Paper Link - 31 May, 2025 - Comments: 0

A new technical paper titled "Power Consumption Optimization of GPU Server With Offline Reinforcement Learning" was published by researchers at Korea Advanced Institute of Science and Technology (KAIST) and KT Research and Development Center. "Optimizing GPU server power consumption is complex due to the interdependence of various components. Conventional methods often involve trade-offs: in... » read more

Distributed Voltage And Frequency Scaling Gaining Traction
By Ed Sperling - 16 Dec, 2024 - Comments: 0

DVFS has been used in smart phones for more than a decade as a way of trading off power and performance when both are constrained, but much of the semiconductor industry has avoided this technique because it's too difficult to work with. That's starting to change as processing demands increase, driven by the rollout of AI everywhere and an increase in the number of features in advanced packages... » read more

Application-Optimized Processors
By Ed Sperling - 29 Sep, 2023 - Comments: 0

Executing a neural network on top of an NPU requires an understanding of application requirements, such as latency and throughput, as well as the potential partitioning challenges. Sharad Chole, chief scientist and co-founder of Expedera, talks about fine-grained dependencies, why processing packets out of order can help optimize performance and power, and when to use voltage and frequency scal... » read more

Energy-Efficient Execution Scheme For Dynamic Neural Networks on Heterogeneous MPSoCs
By Technical Paper Link - 04 Mar, 2023 - Comments: 0

A technical paper titled "Map-and-Conquer: Energy-Efficient Mapping of Dynamic Neural Nets onto Heterogeneous MPSoCs" was published (preprint) by researchers at LAMIH/UMR CNRS, Universite Polytechnique Hauts-de-France and UC Irvine. Abstract "Heterogeneous MPSoCs comprise diverse processing units of varying compute capabilities. To date, the mapping strategies of neural networks (NNs) onto ... » read more

Screening For Silent Data Errors
By Anne Meixner - 10 Jan, 2023 - Comments: 0

Engineers are beginning to understand the causes of silent data errors (SDEs) and the data center failures they cause, both of which can be reduced by increasing test coverage and boosting inspection on critical layers. Silent data errors are so named because if engineers don’t look for them, then they don’t know they exist. Unlike other kinds of faulty behaviors, these errors also can c... » read more

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