Preparing For Ferroelectric Devices

By Katherine Derbyshire - 02 Oct, 2024 - Comments: 0

The discovery of ferroelectricity in materials that are compatible with integrated circuit manufacturing has sparked a wave of interest in ferroelectric devices. Ferroelectrics are materials with a permanent polarization, the direction of which can be switched by an applied field. This polarization can be used to raise or lower the threshold voltage of a transistor, as in FeFETs, or it can c... » read more

3D Integration Supports CIM Versatility And Accuracy

By Katherine Derbyshire - 18 Jan, 2024 - Comments: 0

Compute-in-memory (CIM) is gaining attention due to its efficiency in limiting the movement of massive volumes of data, but it's not perfect. CIM modules can help reduce the cost of computation for AI workloads, and they can learn from the highly efficient approaches taken by biological brains. When it comes to versatility, scalability, and accuracy, however, significant tradeoffs are requir... » read more

Research Bits: Nov. 28

By Jesse Allen - 28 Nov, 2023 - Comments: 0

Switchable photodetector and neuromorphic vision sensor Researchers from the Institute of Metal Research at the Chinese Academy of Sciences built a device that can be switched between being a photodetector and neuromorphic vision sensor by adjusting the operating voltage. The trench-bridged GaN/Ga2O3/GaN heterojunction array device exhibits volatile and non-volatile photocurrents at low and hi... » read more

Research Bits: August 22

By Jesse Allen - 22 Aug, 2023 - Comments: 0

Photonic memory Researchers from Zhejiang University, Westlake University, and the Chinese Academy of Sciences developed a 5-bit photonic memory capable of fast volatile modulation and proposed a solution for a nonvolatile photonic network supporting rapid training. This was made possible by integrating the low-loss phase-change material (PCM) antimonite (Sb2S3) into a silicon photonic plat... » read more

Chip Industry’s Technical Paper Roundup: Oct 18

By Linda Christensen - 18 Oct, 2022 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=57 /] » read more

A Full-Stack Domain-Specific Overlay Generation Framework Verified On FPGA

By Technical Paper Link - 12 Oct, 2022 - Comments: 0

A new technical paper titled "OverGen: Improving FPGA Usability through Domain-specific Overlay Generation" by researchers at UCLA and Chinese Academy of Sciences. "Our essential idea is to develop a hardware generation framework targeting a highly-customizable overlay, so that the abstraction gap can be lowered by tuning the design instance to applications of interest. We leverage and ext... » read more

Research Bits: Aug. 30

By Jesse Allen - 30 Aug, 2022 - Comments: 0

Through glass vias Researchers from the Chinese Academy of Sciences (CAS) developed a Through Glass Via (TGV) process for 3D advanced packaging, which they say enables low transmission loss and high vacuum wafer-level packaging of high-frequency chips and MEMS sensors. TGV is a vertical interconnection technology applied in wafer-level vacuum packaging. The researchers found that it has goo... » read more

Technical Paper Round-Up: July 5

By Linda Christensen - 05 Jul, 2022 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=36 /] Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a good fit for... » read more

One Transistor Process-in-Memory Device Strategy w/ Multi-Functional Multi-Gate One-transistor (MGT) Design of Multiple Electrodes

By Technical Paper Link - 04 Jul, 2022 - Comments: 0

New technical paper titled "Multi-functional multi-gate one-transistor process-in-memory electronics with foundry processing and footprint reduction" from researchers at Ningbo Institute of Materials Technology and Engineering (Chinese Academy of Sciences), Center of Materials Science and Optoelectronics Engineering (University of Chinese Academy of Sciences), Shanghai Institute of Microsystem ... » read more

Research Bits: May 31

By Jesse Allen - 31 May, 2022 - Comments: 0

Carbon nanotube transistors Researchers from the National Institute for Materials Science, National University of Science and Technology, Emanuel Institute of Biochemical Physics, Chinese Academy of Sciences, National Institute of Advanced Industrial Science and Technology, University of Tokyo, Tianjin University, and Queensland University of Technology created transistors out of carbon nanotu... » read more

← Older posts

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?