DDR PHY Training

By Ed Sperling - 21 Apr, 2020 - Comments: 0

Brett Murdock, senior product marketing manager at Synopsys, explains how to train the DRAM physical layer using firmware, why that is so important for flexibility, and what kinds of issues engineers encounter when using this approach. » read more

Medical, Industrial & Aerospace IC Design Changes

By Ann Mutschler - 30 Mar, 2020 - Comments: 0

Medical, industrial and aerospace chips are becoming much more complex as more intelligence is added into these devices, forcing design teams to begin leveraging tools and methodologies that typically have been used only at the leading-edge nodes for commercial applications. But as with automotive, the needs of these systems are changing quickly. In addition to strict quality, safety and sec... » read more

Week In Review: Design, Low Power

By Jesse Allen - 13 Mar, 2020 - Comments: 0

Tools & IP Synopsys revealed DSO.ai (Design Space Optimization AI), an autonomous AI application that searches for optimization targets in very large solution spaces of chip design, inspired by the process of DeepMind's game-playing AlphaZero. DSO.ai engines ingest large data streams generated by chip design tools and use them to explore search spaces, observing how a design evolves over t... » read more

EDA In The Cloud

By Ed Sperling - 18 Feb, 2020 - Comments: 0

Michael White, director of product marketing for Calibre physical verification at Mentor, a Siemens Business, looks at the growing compute requirements at 7, 5 and 3nm, why the cloud looks increasingly attractive from a security and capacity standpoint, and how the cloud as well as new lithography will affect the cost and complexity of developing new chips. » read more

Week In Review: Design, Low Power

By Ed Sperling - 14 Feb, 2020 - Comments: 0

Processors Arm rolled out a micro neural processing unit that, when combined with its newest microcontroller, can increase machine learning performance by up to 480 times. The company is aiming the MCU and co-processor across a wide swath of applications. Worth noting is that Arm calls its Cortex-M55 an AI-capable processor, rather than a microcontroller, as the lines between the various proce... » read more

Week In Review: Design, Low Power

By Jesse Allen - 07 Feb, 2020 - Comments: 0

Presto Engineering, an outsourced operations provider to semiconductor and IoT device manufacturers, acquired the DELTA Microelectronics business unit of FORCE Technology. The acquisition adds DELTA's ASIC design and manufacturing to its portfolio. The two companies will retain a strong relationship: FORCE Technology has become a shareholder of Presto Engineering and Juan Farré, FORCE’s CTO,... » read more

Week In Review: Design, Low Power

By Jesse Allen - 24 Jan, 2020 - Comments: 0

Xilinx filed a patent infringement countersuit against Analog Devices, alleging infringement of eight U.S. patents including technologies involving serializers/deserializers (SerDes), high-speed ADCs and DACs, as well as mixed-signal devices targeting 5G and other markets. The counterclaims are in response to Analog Devices' December lawsuit alleging unauthorized use by Xilinx of eight ADI pate... » read more

Dealing With ECOs In Complex Designs

By Ed Sperling - 22 Jan, 2020 - Comments: 0

Namsuk Oh, R&D principal engineer at Synopsys, talks about the impact of more corners and engineering change orders, how that needs to be addressed in the flow to close timing, and how dependencies can complicate any changes that are required. » read more

Priorities Shift In IC Design

By Ann Mutschler - 16 Jan, 2020 - Comments: 0

The rush to the edge and new applications around AI are causing a shift in design strategies toward the highest performance per watt, rather than the highest performance or lowest power. This may sound like hair-splitting, but it has set a scramble in motion around how to process more data more quickly without just relying on faster processors and accelerators. Several factors are driving th... » read more

CEO Outlook: 2020 Vision

By Ed Sperling - 06 Jan, 2020 - Comments: 0

The start of 2020 is looking very different than the start of 2019. Markets that looked hazy at the start of 2019, such as 5G, are suddenly very much in focus. The glut of memory chips that dragged down the overall chip industry in 2019 has subsided. And a finely tuned supply chain that took decades to develop is splintering. A survey of CEOs from across the industry points to several common... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: chip design

DDR PHY Training

Medical, Industrial & Aerospace IC Design Changes

Week In Review: Design, Low Power

EDA In The Cloud

Week In Review: Design, Low Power

Week In Review: Design, Low Power

Week In Review: Design, Low Power

Dealing With ECOs In Complex Designs

Priorities Shift In IC Design

CEO Outlook: 2020 Vision