Critical Design Considerations For High-Bandwidth Chiplet Interconnects (TSMC)


A new technical paper titled "High-Bandwidth Chiplet Interconnects for Advanced Packaging Technologies in AI/ML Applications: Challenges and Solutions" was published by researchers at TSMC. Abstract: "The demand for chiplet integration using 2.5D and 3D advanced packaging technologies has surged, driven by the exponential growth in computing performance required by Artificial Intelligence a... » read more

Considerations to Successfully Integrate Chiplets in Designs


Chiplet integration is a promising approach to creating heterogeneous and complex system-on-chips (SoCs) with significant performance, power, scalability, flexibility, and cost benefits. However, chiplet integration also poses substantial design, verification, testing, and packaging challenges, requiring new standards and design methodologies. Electronic design automation (EDA) software and sim... » read more

A Performance-Aware Framework For Co-Optimizing Floorplan And Performance Of Chiplet-Based Architecture


A technical paper titled “Floorplet: Performance-aware Floorplan Framework for Chiplet Integration” was published by researchers at Chinese University of Hong Kong and University of California Berkeley. Abstract: "A chiplet is an integrated circuit that encompasses a well-defined subset of an overall system's functionality. In contrast to traditional monolithic system-on-chips (SoCs),... » read more