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Neuromorphic photonic circuit modeling in Verilog-A


Abstract "One of the significant challenges in neuromorphic photonic architectures is the lack of good tools to simulate large-scale photonic integrated circuits. It is crucial to perform simulations on a single platform to capture the circuit’s behavior in the presence of both optical and electrical components. Here, we adopted a Verilog-A based approach to model neuromorphic photonic cir... » read more

The Future Of FinFETs At 5nm And Beyond


While contact gate pitch (GP) and fin pitch (FP) scaling continues to provide higher performance and lower power to finFET platforms, controlling RC parasitics and achieving higher transistor performance at technology nodes of 5nm and beyond becomes challenging. In collaboration with Imec, we recently used SEMulator3D virtual fabrication to explore an end-to-end solution to better underst... » read more