Bridging IC Design, Manufacturing, And In-Field Reliability


Experts at the Table: Semiconductor Engineering sat down to talk about silicon lifecycle management and how that can potentially glue together design, manufacturing, and devices in the field, with Prashant Goteti, principal engineer at Intel; Rob Aitken, R&D fellow at Arm; Zoe Conroy, principal hardware engineer at Cisco; Subhasish Mitra, professor of electrical engineering and computer sci... » read more

Lots Of Data, But Uncertainty About What To Do With It


Experts at the Table: Semiconductor Engineering sat down to talk about silicon lifecycle management in heterogeneous designs, where sensors produce a flood of data, with Prashant Goteti, principal engineer at Intel; Rob Aitken, R&D fellow at Arm; Zoe Conroy, principal hardware engineer at Cisco; Subhasish Mitra, professor of electrical engineering and computer science at Stanford University... » read more

Efficacy of Transistor Interleaving in DICE Flip-Flops at a 22 nm FD SOI Technology Node


New research paper from University of Saskatchewan, with funding by NSERC and the Cisco University Research Program. Abstract "Fully Depleted Silicon on Insulator (FD SOI) technology nodes provide better resistance to single event upsets than comparable bulk technologies, but upsets are still likely to occur at nano-scale feature sizes, and additional hardening techniques should be explor... » read more

Silicon Lifecycle Management’s Growing Impact On IC Reliability


Experts at the Table: Semiconductor Engineering sat down to talk about silicon lifecycle management, how it's expanding and changing, and where the problems are, with Prashant Goteti, principal engineer at Intel; Rob Aitken, R&D fellow at Arm; Zoe Conroy, principal hardware engineer at Cisco; Subhasish Mitra, professor of electrical engineering and computer science at Stanford University; a... » read more

Week In Review: Auto, Security, Pervasive Computing


Automotive Verizon and Cisco demonstrated a C-V2X network for autonomous driving in Las Vegas that avoids using costly physical roadside units to extend radio signals. Instead, Verizon and Cisco say their test proved that Verizon’s LTE network and public 5G Edge with AWS Wavelength, together with Cisco Catalyst IR1101 routers in connected infrastructure, were adequate to meet the latency nee... » read more

Week In Review: Manufacturing, Test


Chipmakers and OEMs Apple has rolled out its most powerful processor, dubbed the M1 Ultra, a multi-die chip that incorporates the company's new packaging technology. The M1 Ultra is incorporated in Apple’s new Mac Studio desktop. M1 Ultra features a 20-core CPU, a 64-core GPU, and a 32-core Neural Engine. The M1 Ultra also features UltraFusion, Apple’s new packaging architecture. M1 Ult... » read more

Week In Review: Auto, Security, Pervasive Computing


Automotive The automotive chip shortage is still affecting automotive OEMs. U.S. automakers Ford and GM reported lower 3rd quarter income year over year related to the chip shortage. They, as well as other automotive OEMs around the world, have had to temporarily shut assembly lines down when chips were not available. Infineon Technologies signed a memorandum of understanding with Hyundai M... » read more

Week In Review: Manufacturing, Test


Packaging and test Advantest and PDF Solutions have launched their first jointly developed offering since forming a partnership in 2020. The new product is called the Advantest Cloud Solutions Dynamic Parametric Test (ACS DPT) solution. It integrates PDF Solutions’ Exensio portfolio of data analytics with Advantest’s V93000 Parametric Test System. The ACS DPT solution is designed to op... » read more

Sweeping Changes Ahead For Systems Design


Data centers are undergoing a fundamental change, shifting from standard processing models to more data-centric approaches based upon customized hardware, less movement of data, and more pooling of resources. Driven by a flood of web searches, Bitcoin mining, video streaming, data centers are in a race to provide the most efficient and fastest processing possible. But because there are so ma... » read more

Piecing Together Chiplets


Several companies are implementing the chiplet model as a means to develop next-generation 3D-like chip designs, but this methodology still has a long way to go before it becomes mainstream for the rest of the industry. It takes several pieces to bring up a 3D chip design using the chiplet model. A few large players have the pieces, though most are proprietary. Others are missing some key co... » read more

← Older posts Newer posts →