Detecting Architectural Vulnerabilities in Closed-Source RISC-V CPUs (CISPA)


The paper "RISCover: Automatic Discovery of User-exploitable Architectural Security Vulnerabilities in Closed-Source RISC-V CPUs" was published by researchers at CISPA Helmholtz Center for Information Security. Abstract "The open and extensible RISC-V instruction set has enabled many new CPU vendors and implementations, but most commercial CPUs are closed-source, significantly hindering vul... » read more

Chip Industry Technical Paper Roundup: Feb. 9


New technical papers recently added to Semiconductor Engineering’s library: [table id=521 /] Find more semiconductor research papers here. » read more

Chip Industry Week in Review


Geopolitics Taiwan and the U.S. signed a trade agreement this week, with TSMC and other Taiwanese companies collectively pledging to directly invest at least $250B in investments in advanced semiconductor, energy and AI production and capacity in the U.S.  The agreement also included Taiwan providing another $250B in credit guarantees for additional IC supply chain expansions in the U.S., cap... » read more

Chip Industry Technical Paper Roundup: June 17


New technical papers recently added to Semiconductor Engineering’s library: [table id=440 /] Find more semiconductor research papers here.   » read more

Evaluation of LLMs on HDL-Based Communication Protocol Generation (U. of Illinois Urbana, CISPA)


A new technical paper titled "ProtocolLLM: RTL Benchmark for SystemVerilog Generation of Communication Protocols" was published by researchers at University of Illinois Urbana Champaign and CISPA Helmholtz Center for Information Security. Abstract "Recent advances in Large Language Models (LLMs) have shown promising capabilities in generating code for general-purpose programming languages. ... » read more

Chip Industry Technical Paper Roundup: Oct. 14


New technical papers recently added to Semiconductor Engineering’s library: [table id=367 /] More Reading Chip Industry Week In Review AI CPU chiplet platform; Intel-AMD pact; GDDR7 DRAM; AI-RFIC funding; CHIPS Act awards; NoC tiling; thermal modeling on chiplets; $900M nuclear tech and more. Technical Paper Library home » read more

Lightweight, High-Performance CPU Extension for Protected Key Handles with CPU-Enforced Usage (CISPA, Ruhr Univ. Bochum)


A new technical paper titled "KeyVisor -- A Lightweight ISA Extension for Protected Key Handles with CPU-enforced Usage Policies" was published by researchers at CISPA Helmholtz Center for Information Security and Ruhr University Bochum. Abstract "The confidentiality of cryptographic keys is essential for the security of protection schemes used for communication, file encryption, and outsou... » read more

Chip Industry Technical Paper Roundup: August 15


New technical papers added to Semiconductor Engineering’s library this week. [table id=128 /] More Reading Technical Paper Library home » read more

How Attackers Can Read Data From CPU’s Memory By Analyzing Energy Consumption


A technical paper titled “Collide+Power: Leaking Inaccessible Data with Software-based Power Side Channels” was published by researchers at Graz University of Technology and CISPA Helmholtz Center for Information Security. Abstract: "Differential Power Analysis (DPA) measures single-bit differences between data values used in computer systems by statistical analysis of power traces. In th... » read more

Chip Industry’s Technical Paper Roundup: June 5


New technical papers recently added to Semiconductor Engineering’s library: [table id=105 /] More Reading Technical Paper Library home » read more

← Older posts