Making IP Friendlier

By Brian Bailey - 27 Dec, 2018 - Comments: 2

Semiconductor Engineering sat down to discuss IP tracking and management with Ranjit Adhikary, vice president of marketing for ClioSoft; Jim Bruister, director digital systems (since retired) at Silvaco; Marc Greenberg, product marketing group director at Cadence; and Kelvin Low, vice president of marketing at Arm. What follows are excerpts from that conversation. Part one can be found here. ... » read more

Dirty Data: Is the Sensor Malfunctioning?

By Susan Rambo - 06 Dec, 2018 - Comments: 2

Sensors provide an amazing connection to the physical world, but extracting usable data isn't so simple. In fact, many first-time IoT designers are unprepared for how messy a sensor’s data can be. Every day the IoT motion-sensor company MbientLab struggles to tactfully teach its customers that the mountain of data they are seeing is not because the sensors are faulty. Instead, the system d... » read more

Physical Verification In The Cloud

By Manoz Palaparthi - 29 Nov, 2018 - Comments: 0

Cloud computing is no longer “the next big thing”; it has become a mainstream tool for business across many industries. Our own industry of IC Design and EDA, however, has been watching the cloud trend closely from the sidelines. We have been cautious and have not embraced Cloud as much as other industries – until now. What changed this year? What is driving design companies and EDA tool ... » read more

IP Tracking and Management

By Brian Bailey - 29 Nov, 2018 - Comments: 0

Semiconductor Engineering sat down to discuss IP tracking and management with Ranjit Adhikary, VP of marketing for ClioSoft; Jim Bruister, director digital systems (since retired) at Silvaco; Marc Greenberg, product marketing group director at Cadence; and Kelvin Low, VP of Marketing at Arm. What follows are excerpts from that conversation. SE: What is the scope of the problem? What are ... » read more

AI Chip Architectures Race To The Edge

By Kevin Fogarty - 28 Nov, 2018 - Comments: 0

As machine-learning apps start showing up in endpoint devices and along the network edge of the IoT, the accelerators that make AI possible may look more like FPGA and SoC modules than current data-center-bound chips from Intel or Nvidia. Artificial intelligence and machine learning need powerful chips for computing answers (inference) from large data sets (training). Most AI chips—both tr... » read more

Power/Performance Bits: Nov. 20

By Jesse Allen - 20 Nov, 2018 - Comments: 0

In-memory compute accelerator Engineers at Princeton University built a programmable chip that features an in-memory computing accelerator. Targeted at deep learning inferencing, the chip aims to reduce the bottleneck between memory and compute in traditional architectures. The team's key to performing compute in memory was using capacitors rather than transistors. The capacitors were paire... » read more

How To Automate A Parking Lot

By Maen Suleiman - 01 Nov, 2018 - Comments: 1

By Maen Suleiman and Gorka Garcia Applications at the edge of the network require special technologies, such as efficient packet processing, machine learning and connectivity to the cloud. The edge crosses a multitude of markets, including small business, industrial and enterprise, and it can include everything from devices you might expect to find at the edge to unusual concepts such as... » read more

EDA Cloud Adoption Hits Speed Bumps

By Brian Bailey - 25 Oct, 2018 - Comments: 0

If moving semiconductor design to the Cloud was easy and beneficial, everyone would be doing it. But so far, few have done more than dip a toe. The level of difficulty associated with migrating to the Cloud varies, depending upon who you talk to. The reality is that not everyone makes it as easy as it could be, or is not willing to put the necessary effort into making it easier. There is cer... » read more

The Power Of Ecosystems At Arm TechCon 2018

By Frank Schirrmeister - 25 Oct, 2018 - Comments: 0

I have long been fascinated by the workings of ecosystems. Last week’s Arm TechCon in San Jose was a textbook example of how ecosystems work, overlap and how the electronics development work is indeed like a village—it takes many players to make things happen to enable end users to receive the latest gadgets like phones, fitness trackers, electronic watches, etc. The game of electronic ecos... » read more

Week In Review: Design, Low Power

By Jesse Allen - 05 Oct, 2018 - Comments: 0

Mirabilis Design debuted an AI-driven tool for performance analysis and architecture exploration of SoCs and embedded systems. VisualSim AI Processor Generator creates pipeline-accurate models that have port integration with standard buses and memories, which is used to compare different processor families, optimize the specification and identify system bottlenecks. The generated model supports... » read more

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Knowledge Centers
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A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

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NAND Flash Targets 1,000 Layers

New techniques go beyond improved deposition and etching, but challenges stack up, too.

by Bryon Moyer

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

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Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Making IP Friendlier

Dirty Data: Is the Sensor Malfunctioning?

Physical Verification In The Cloud

IP Tracking and Management

AI Chip Architectures Race To The Edge

Power/Performance Bits: Nov. 20

How To Automate A Parking Lot

EDA Cloud Adoption Hits Speed Bumps

The Power Of Ecosystems At Arm TechCon 2018

Week In Review: Design, Low Power

Is In-Memory Compute Still Alive?

Baby Steps Toward 3D DRAM

Chip Industry Week In Review

Chip Industry Week in Review

What’s Next For Through-Silicon Vias