tag: Codasip

Blog Review: September 6
By Jesse Allen - 06 Sep, 2023 - Comments: 0

Cadence's Reela Samuel listens in as industry experts discuss whether generative AI-powered tools could facilitate the creation of diverse chip types and address talent shortages by creating  a more accessible entry point for those interested in circuit, chip, or system design. Synopsys' Ian Land, Jigesh Patel, and Kenneth Larsen find that the way that today’s government, aerospace, and d... » read more

New Concepts Required For Security Verification
By Brian Bailey - 28 Aug, 2023 - Comments: 0

Verification for security requires new practices in both the development and verification flows, but tools and methodologies to enable this are rudimentary today. Flows are becoming more complex, especially when they span multiple development groups. Security is special in that it is pervasive throughout the development process, requiring both positive and negative verification. Positive ver... » read more

RISC-V Customization Gets A Standing Ovation
By Mike Eftimakis - 24 Aug, 2023 - Comments: 0

Processor vendors have always tried to create a large software ecosystem around their products, because it creates stickiness and it naturally “locks-in” large numbers of customers who have invested in the creation of dedicated software. This effect is growing over time as the quantity of software is ever increasing per product: we could talk about more than 100 million lines of code in a c... » read more

Blog Review: Aug. 23
By Jesse Allen - 23 Aug, 2023 - Comments: 0

Siemens' Stephen Chavez discusses best practices when it comes to thermal analysis for PCB design, including component placement and close collaboration between mechanical and electrical engineering disciplines. Synopsys' Gary Ruggles, Richard Solomon, and Varun Agrawal introduce the Compute Express Link (CXL) specification and how it could help improve latency through computational offloadi... » read more

Blog Review: Aug. 2
By Jesse Allen - 02 Aug, 2023 - Comments: 0

Siemens' Katie Tormala points to the need for die attach thermal testing to ensure efficient removal of heat dissipation from power electronics components to prevent premature failure or thermal runaway. Synopsys's Dermott Lynch notes that over 30% of semiconductor failures are attributed to electrostatic discharge, with damage ranging from leakages and shorts to junction and metallization b... » read more

Shift Left, Extend Right, Stretch Sideways
By Brian Bailey - 27 Jul, 2023 - Comments: 0

The EDA industry has been talking about shift left for a few years, but development flows are now being stretched in two additional ways, extending right to include silicon lifecycle management, and sideways to include safety and security. In addition, safety and security join verification and power as being vertical concerns, and we are increasingly seeing interlinking within those concerns. ... » read more

Re-Targetable LLVM C/C++ Compiler For RISC-V
By Zdeněk Přikryl - 27 Jul, 2023 - Comments: 0

RISC-V is a modular instruction set architecture (ISA) with great customization capabilities that enable innovation and differentiation without fragmentation. On top of the baseline modules from ratified/standard ISA extensions, such as integer instructions or floating-point instructions, designers can add custom instructions: pure design freedom! And the reasons for adding instructions are man... » read more

Blog Review: July 26
By Jesse Allen - 26 Jul, 2023 - Comments: 0

Siemens' Chris Spear shows how to make a group of specialized classes in SystemVerilog. Synopsys' Guy Cortez and Randy Fish consider what a silicon lifecycle management strategy looks like for SoCs deployed in HPC and data center environments. Cadence's Veena Parthan provides a primer on writing Python scripts for Fidelity, including API descriptions and different sets of packages to acce... » read more

Blog Review: July 19
By Jesse Allen - 19 Jul, 2023 - Comments: 0

Siemens' Keith Felton argues that co-design-driven semiconductor package planning and prototyping is critical for design success and points to how interchange formats enable designers to make trade-off decisions for both the package and the board and communicate those recommendations back to the other design team in formats that are native to their tools. Cadence's Xin Mu explains precoding ... » read more

Week In Review: Design, Low Power
By Jesse Allen - 07 Jul, 2023 - Comments: 0

Worldwide semiconductor industry sales dropped 21% year-over-year in May to $40.7 billion, mostly driven by decreases in the Americas (-22%), Asia Pacific/All Other (-23%), and China (-29%). But there also were hints of a recovery. The three-month moving average showed a 1.7% increase in sales, with the largest increases in China (+3.9%) and Europe (+2%). “Despite continuing market sluggishne... » read more

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