Improving EUV Process Efficiency

By Mark LaPedus - 19 Mar, 2020 - Comments: 2

The semiconductor industry is rethinking the manufacturing flow for extreme ultraviolet (EUV) lithography in an effort to improve the overall process and reduce waste in the fab. Vendors currently are developing new and potentially breakthrough fab materials and equipment. Those technologies are still in R&D and have yet to be proven. But if they work as planned, they could boost the flo... » read more

Week In Review: Manufacturing, Test

By Mark LaPedus - 28 Feb, 2020 - Comments: 2

SPIE At the SPIE Advanced Lithography conference, Lam Research has introduced a new dry resist technology for extreme ultraviolet (EUV) lithography. Dry resist technology is a new approach to deposit and develop EUV resists. It is a dry deposition technique with alternate compositions and mechanisms. By combining Lam’s deposition and etch process expertise with partnerships with ASML a... » read more

Demand Picks Up For 200mm

By Mark LaPedus - 20 Feb, 2020 - Comments: 0

Demand is growing for both 200mm fab capacity and equipment, setting the stage for possible shortages in coming months. But there are also some uncertainties, if not warning signs, in the 200mm market and the entire IC industry. Trade disputes, as well as the current coronavirus outbreak in China, likely will impact the chip and equipment markets. The size of the impact and the duration rema... » read more

Finding Defects In EUV Masks

By Mark LaPedus - 23 Jan, 2020 - Comments: 0

Extreme ultraviolet (EUV) lithography is finally in production at advanced nodes, but there are still several challenges with the technology, such as EUV mask defects. Defects are unwanted deviations in chips, which can impact yield and performance. They can crop up during the chip manufacturing process, including the production of a mask or photomask, sometimes called a reticle. Fortunately... » read more

5/3nm Wars Begin

By Mark LaPedus - 23 Jan, 2020 - Comments: 6

Several foundries are ramping up their new 5nm processes in the market, but now customers must decide whether to design their next chips around the current transistor type or move to a different one at 3nm and beyond. The decision involves the move to extend today’s finFETs to 3nm, or to implement a new technology called gate-all-around FETs (GAA FETs) at 3nm or 2nm. An evolutionary step f... » read more

Where Technology Breakthroughs Are Needed

By Mark LaPedus - 23 Dec, 2019 - Comments: 2

After years of delays, extreme ultraviolet (EUV) lithography is finally in production at the 7nm logic node with 5nm in the works. EUV, a next-generation lithography technology, certainly will help chipmakers migrate to the next nodes. But EUV doesn’t solve every problem. Nor does it address all challenges in the semiconductor industry. Not by a long shot. To be sure, the industry needs... » read more

Multi-Patterning EUV Vs. High-NA EUV

By Mark LaPedus - 04 Dec, 2019 - Comments: 4

Foundries are finally in production with EUV lithography at 7nm, but chip customers must now decide whether to implement their next designs using EUV-based multiple patterning at 5nm/3nm or wait for a new single-patterning EUV system at 3nm and beyond. This scenario revolves around ASML’s current extreme ultraviolet (EUV) lithography tool (NXE:3400C) versus a completely new EUV system with... » read more

Blog Review: Nov. 27

By Jesse Allen - 27 Nov, 2019 - Comments: 0

Arm's Ben Fletcher digs into what's needed to make wireless 3D integration a reality from a tool to automate the design and optimization process for inductors used in wireless 3D-ICs to exploring how the data can be encoded in the transceiver to reduce power consumption. Cadence's Paul McLellan listens in as Eli Singerman of Intel explains the importance of platform security and why firmware... » read more

Making And Protecting Advanced Masks

By Mark LaPedus - 27 Nov, 2019 - Comments: 0

Semiconductor Engineering sat down to discuss lithography and photomask trends with Bryan Kasprowicz, director of technology and strategy and a distinguished member of the technical staff at Photronics; Thomas Scheruebl, director of strategic business development and product strategy at Zeiss; Noriaki Nakayamada, senior technologist at NuFlare; and Aki Fujimura, chief executive of D2S. What fol... » read more

Using Digital Twins And DL In Lithography

By Ed Sperling - 21 Nov, 2019 - Comments: 0

Leo Pang, chief product officer and executive vice president at D2S, looks at the results of inverse lithography technology at advanced nodes using curvilinear patterns, and how that can be combined with a digital twin and deep learning speed up time to market and reduce cost. » read more

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Improving EUV Process Efficiency

Week In Review: Manufacturing, Test

Demand Picks Up For 200mm

Finding Defects In EUV Masks

5/3nm Wars Begin

Where Technology Breakthroughs Are Needed

Multi-Patterning EUV Vs. High-NA EUV

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Making And Protecting Advanced Masks

Using Digital Twins And DL In Lithography

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